EM44DM1688LBB
AC Operating Test Characteristics
(V
DD
=1.8V±0.1V)
Symbol
t
AC
t
DQSCK
t
CL
,t
CH
t
CK
t
DS
t
DH
t
DIPW
t
HZ
t
LZ (DQ)
t
LZ (DQS)
t
DQSQ
t
QHS
t
DQSS
t
DQSL
,t
DQSH
t
DSL
,t
DSH
t
MRD
t
WPRES
t
WPRE
t
WPST
t
IS
t
IH
t
RPRE
Parameter
DQ output access from CLK,/CLK
DQS output access from CLK,/CLK
CL low/high level width
Clock Cycle Time
DQ and DM setup time
DQ and DM hold time
DQ and DM input pulse width for each
input
Data out high impedance time from
CLK,/CLK
DQ low impedance time from CLK,/CLK
DQS,/DQS low impedance time from
CLK,/CLK
DQS-DQ skew for associated DQ signal
Data hold skew factor
Write command to first latching DQS
transition
DQS Low/High input pulse width
DQS input valid window
Mode Register Set command cycle time
Write Preamble setup time
Write Preamble
Write Postamble
Address/control input setup time (fast
slew rate)
Address/control input hold time
(fast slew rate)
Read Preamble
-187 (DDR2-1066)
Min.
-350
-350
0.48
1.875
50
75
0.35
-
2*t
AC
(min)
-25 (DDR2-800)
Min.
-400
-350
0.48
2.5
50
125
0.35
-
2*t
AC
(min)
Units
ps
ps
t
CK
ns
ps
ps
t
CK
ns
ns
ns
ps
ps
t
CK
t
CK
t
CK
t
CK
ns
t
CK
t
CK
ns
ns
t
CK
Max.
350
350
0.52
8
-
-
-
t
AC
(max)
Max.
400
350
0.52
8
-
-
-
t
AC
(max)
t
AC
(max)
t
AC
(max)
t
AC
(min)
t
AC
(max)
t
AC
(min)
t
AC
(max)
-
-
-0.25
0.35
0.20
2
0
0.35
0.4
0.175
0.25
0.9
175
250
0.25
-
-
-
-
-
0.6
-
-
1.1
-
-
-0.25
0.35
0.20
2
0
0.35
0.4
0.20
0.275
0.9
200
300
0.25
-
-
-
-
-
0.6
-
-
1.1
Nov. 2011
12/29
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EOREX [ EOREX CORPORATION ]
