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EM47EM1688SBA-150 参数 Datasheet PDF下载

EM47EM1688SBA-150图片预览
型号: EM47EM1688SBA-150
PDF下载: 下载PDF文件 查看货源
内容描述: JEDEC标准VDD / VDDQ [JEDEC Standard VDD/VDDQ]
分类和应用:
文件页数/大小: 37 页 / 651 K
品牌: EOREX [ EOREX CORPORATION ]
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EM47EM1688SBA
AC and DC Logic Input Levels for Differential Signals
Differential signals definition
Differential AC and DC Input Levels
Symbol
V
IHdiff
V
ILdiff
V
IHdiff
(AC)
V
ILdiff
(AC)
Parameter
Differential input high
Differential input low
AC Differential input high
AC Differential input low
Min.
+0.2
See
Note3
2x(VIH(AC)-VREF)
See
Note3
Max.
See
Note3
-0.2
See
Note3
2x(VIL(AC)-VREF)
Units
V
V
V
V
Note
1
1
2
2
Note1.
It is used to define a differential signal slew-rate.
Note2.
F
or CK - /CK use VIH/VIL(AC) of address/command and VREFCA; for strobes (DQS, DQS) use VIH/VIL(AC) of
DQs and VREFDQ; if a reduced ac-high or ac-low level is used for a signal group, then the reduced level applies
also here.
Note3.
These values are not defined, however they single-ended signals CK, /CK, DQS, /DQS need to be
within the respective limits (VIH(DC) max, VIL(DC)min) for single-ended signals.
Mar. 2012
9/37
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