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Timing Diagram of Data Input and Output
The access time (tAT) is divided into two parts:
TSAD: The synchronous access time. This time defines the time of the
maximum number of cycles which are required to access a byte of the
memory field.
TAAD: The synchronous access time to read a byte out of the memory field.
The synchronous part of the access time is sum of the command frame length
and some additional internal cycles (NSAD = 16 cycles). At 20MHz one
cycle is 50ns (1/fCLK), multiplied with NSAD the resulting frame time is
TSAD = 0.8µs. The asynchronous access delay TAAD = 600µs maximum.
The resulting memory access time tAT is the sum of both parts:
tAT = TSAD + TAAD
with TSAD = NSAD/ fCLK
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