RTC-58321/58323
n
Block diagram
1024Hz
32.768 kHz
quarts oscillator
OSC
1/2
15
R
BUSY
R
DATA BUS
TEST
1Hz
1/10|1/6
Seconds
S10
1/10|1/6
Minutes
or
1/12|1/24
Hours
1/7
Day-of week
1/10|1/3
Day
1/12
Month
1/10|1/10
Year
BUSY
N
D
1Hz
1024H
z
S1
1/60Hz
M11
1/3600Hz
M110
H1
H10
W
D1
D10
MO1 MO10
Y1
Y10
STOP
R
1’
TEST
R
1’
WRITE
R
1’
READ
R
1’
CS1
CS2
ADDRESS
WRITE
D
0
D
1
D
2
D
3
R
1’
R
1’
R
1’
SWITCH
E, F
ADDRESS
LATCH
D
10’
D
11’
D
12’
D
13’
A
1'
A
1
A
2
A
3
TRI-STATE
CONTROL
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E-F
S1
S10
M11
M110
H1
H10
W
D1
D10
M01
M010
Y1
Y10
D
E-F
u
Rp = 200KΩ TYP
n
Pin functions
Pin numbers
RTC-58321
1
2
3
4 to 7
8
9
10
11
12
13
RTC-58323
5
6
7
8 to 11
12
13
14
15
16
17
CS
2
WRITE
READ
D
0
to D
3
GND
ADDRESS
WRITE
BUSY
STOP
TEST
CS
1
Input
Output
Input
Input
Input
Input
Input
Input
Both
Chip select. When high, device can be accessed.
Set high to write.
Set high to read.
Address/data bus.
Negative power supply.
Address latch. Set high to latch address from D
0
to D
3
.
1 Hz output pin.
1 Hz on/off control pin. When high, the 1 Hz signal is disabled, and
the counter stopped.
Increment pin for the counter. Normally this pin should be fixed low.
Connect to power down detection circuit. (Fix high if there is no
power down detection circuit.) When CS
1
is low, chip cannot be
accessed, regardless of state of CS
2
.
Fix low.
Positive power supply (normally +5 V).
Pin symbol
Input/output
Function
*
14 to 16
1 to 4
18 to 24
NC
V
DD
* A bypass capacitor (minimum 0.01
µF)
must be connected between V
DD
and V
SS
, as close as possible.
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