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S1C33L27 参数 Datasheet PDF下载

S1C33L27图片预览
型号: S1C33L27
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS 32位应用程序特定的控制器 [CMOS 32-bit Application Specific Controller]
分类和应用: 控制器
文件页数/大小: 7 页 / 164 K
品牌: EPSON [ EPSON COMPANY ]
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S1C33L27
• Maximum 72 I/O ports and four input ports are available (TQFP24/QFP20-144pin package).
• Maximum 56 I/O ports and four input ports are available (TQFP15-128pin package).
• Can generate maximum 8 port input interrupts from the 64 I/O ports selected and key input interrupts from
the predefined 32 ports.
* The GPIO ports are shared with other peripheral function pins (USI, PWM etc.). Therefore, the number of
GPIO ports depends on the peripheral functions used.
Calculation Module (CALC)
• Multiply and accumulation (MAC)
• Matrix computation
• Affine transformation
• Butterfly computation
• Supports signed/unsigned 32-bit integer operation mode and signed 16-bit fixed-point values operation
mode with saturation processing.
Operating Voltage
• HVDD (I/O power voltage)
2.7 V to 3.6 V (3.3 V typ.)
or 3.0 V to 3.6 V (3.3 V typ.) when the USB module is used.
• AVDD (analog power voltage)
2.7 V to 3.6 V (3.3 V typ.)
• LVDD (internal logic/internal memory power voltage)
1.65 V to 1.95 V (1.8 V typ.)
or 1.7 V to 1.9 V (1.8 V typ.) when a ceramic resonator is used.
• PLLVDD (PLL power voltage)
1.65 V to 1.95 V (1.8 V typ.)
or 1.7 V to 1.9 V (1.8 V typ.) when a ceramic resonator is used.
• RTCVDD (RTC/BBRAM power voltage)
1.65 V to 1.95 V (1.8 V typ.)
or 1.7 V to 1.9 V (1.8 V typ.) when a ceramic resonator is used.
* LVDD = PLLVDD = RTCVDD, HVDD = AVDD
The S1C33L27 does not support 5 V tolerant I/O.
Operating Temperatures
• -40 to 85°C
• 0 to 70°C when the USB module is used or when a ceramic resonator is used.
Power Consumption
(No I/O current is included.)
• During SLEEP: 2.3
μA
typ. when RTC is running.
1.0
μA
typ. when RTC is not used.
• During HALT: 4.3 mA typ. when 48 MHz OSC3 clock is used as the system clock,
all peripheral clocks = Off.
• During execution: 18 mA typ. when 48 MHz OSC3 clock is used as the system clock,
CPU is running, all peripheral clocks = Off.
* Power consumption can be reduced by controlling the clocks through the clock management unit (CMU).
Shipping Form
• Die form:
200 pads
(5.213 mm × 5.213 mm, pad pitch: 90
μm)
• Plastic package:
TQFP15-128pin (14 mm × 14 mm × 1.0 mm, lead pitch: 0.4 mm)
TQFP24-144pin (16 mm × 16 mm × 1.0 mm, lead pitch: 0.4 mm)
QFP20-144pin
(20 mm × 20 mm × 1.4 mm, lead pitch: 0.5 mm)
PFBGA12U-180 (12 mm × 12 mm × 1.2 mm, ball pitch: 0.8 mm)
Seiko Epson Corporation
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