S1C60N16
BLOCK DIAGRAM
ROM
4,096 words x 12 bits
System Reset
Control
RESET
Core CPU S1C6300C
OSC1
OSC2
OSC3
OSC4
OSC
Interrupt
Generator
K00-K03
K10
TEST
P00-P03
P10-P13
RAM
256 words x 4 bits
Input Port
COM0-3
SEG0-37
V
D0
V
D1
V
C1
V
C2
V
C3
CA
CB
V
SS
LCD Driver
38 SEG x 4 COM
I/O Port
Serial I/F
Power
Controller
Output Port
R00-R03
R10-R13
SVD
Sound
Generator
Event
Counter
AMPP
AMPM
Timer
Comparator
Stopwatch
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson.
Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind
arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no
representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license
to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in
accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may
contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Law of Japan
and may require an export license from the Ministry of Economy, Trade and Industry or other approval from another government agency.
All brands or product names mentioned herein are trademarks and/or registered trademarks of their respective companies.
©Seiko
Epson Corporation 2012, All rights reserved
SEIKO EPSON CORPORATION
MICRODEVICES OPERATIONS DIVISION
Device Sales & Marketing Department
421-8 Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: +81-42-587-5814 FAX: +81-42-587-5117
EPSON semiconductor website
http://www.epson.jp/device/semicon_e/
Document code: 4112298600
First issue February, 2012
3
EPSON [ EPSON COMPANY ]
