SRM20V100LLMX
7
s
FUNCTIONS
q
Truth Table
CS1
H
X
L
L
L
X : "H" or "L"
CS2
X
L
H
H
H
OE
X
X
X
L
H
WE
X
X
L
H
H
DATA I/O
Hi-Z
Hi-Z
Input data
Output data
Hi-Z
Mode
Unselected
Unselected
Write
Read
Output disable
I
DD
I
DDS,
I
DDS1
I
DDS,
I
DDS1
I
DDO
I
DDO
I
DDO
q
Reading data
Data is able to be read when the address is set while holding CS1 = "L", CS2 = "H", OE = "L" and WE = "H".
Since DATA I/O terminals are in high impedance state when OE = "H", the data bus line can be used for any
other objective, then access time apparently is able to be cut down.
q
Writing data
There are the following four ways of writing data into the memory.
(1) Hold CS2 = "H", WE = "L", set addresses and give "L" pulse to CS1.
(2) Hold CS1 = "L", WE = "L" ,set addresses and give "H"pulse to CS2.
(3) Hold CS1 = "L", CS2 = "H", set addresses and give "L" pulse to WE.
(4) After setting addresses, give "L" pulse to CS1, WE and give "H" pulse to CS2.
Anyway, data on the Data I/O terminals are latched up into the SRM20V100LLMX
7
at the end of the period that
CS1, WE are "L" level, and CS2 is "H" level. As Data I/O terminals are in high impedance state when any of
CS1, OE = "H", or CS2 = "L", the contention on the data bus can be avoided.
q
Standby mode
When CS1 is "H" or CS2 is "L" level, the SRM20V100LLMX
7
is in the standby mode which has retaining data
operation. In this case Data I/O terminals are Hi-Z, and all inputs of addresses, WE and data can be any "H" or
"L". When CS1 and CS2 level are in the range over V
DD
-0.2V, CS2 level is in the range under 0.2V, in the
SRM20V100LLMX
7
there is almost no current flow except through the high resistance parts of the memory.
5
EPSON [ EPSON COMPANY ]
