PBL 3775/1
Choose the blanking pulse time to be
longer than the duration of the switching
transients by selecting a proper C
T
value.
The time is calculated as:
t
b
= 210 • C
T
[s]
As the C
T
value may vary from approxi-
mately 2 200 pF to 33 000 pF, a
blanking time ranging from 0.5
µs
to 7
µs
is possible. Nominal value is 4 700 pF,
which gives a blanking time of 1.0
µs.
As the filtering action introduces a
small delay, the peak value across the
sensing resistor, and hence the peak
motor current, will reach a slightly higher
level than what is defined by the
reference voltage. The filtering delay
also limits the minimum possible output
current. As the output will be on for a
short time each cycle, equal to the digital
filtering blanking time plus additional
internal delays, an amount of current will
flow through the winding. Typically this
current is 1-10 % of the maximum output
current set by R
S
.
When optimizing low current perfor-
mance, the filtering may be done by
adding an external low pass filter in
series with the comparator C input. In
this case the digital blanking time should
be as short as possible. The
recommended filter component values
are 10 kohm and 820 pF. Lowering the
switching frequency also helps reducing
the minimum output current.
To create an absolute zero current,
the Dis input should be HIGH.
Switching frequency
The frequency of the clock oscillator is
set by the timing components R
T
and C
T
at the RC-pin. As C
T
sets the digital filter
blanking time, the clock oscillator
frequency is adjusted by R
T
. The value
of R
T
is limited to 2 - 20 kohm. The
frequency is approximately calculated
as:
f
s
= 1 / ( 0.77 • R
T
• C
T
)
Nominal component values of 12 kohm
and 4 700 pF results in a clock
frequency of 23.0 kHz. A lower
frequency will result in higher current
ripple, but may improve low level
linearity. A higher clock frequency
reduces current ripple, but increases the
switching losses in the IC and possibly
the iron losses in the motor.
Phase inputs
A logic HIGH on a Phase input gives a
current flowing from pin M
A
into pin M
B
.
A logic LOW gives a current flow in the
opposite direction. A time delay prevents
cross conduction in the H-bridge when
changing the Phase input.
Dis (Disable) inputs
A logic HIGH on the Dis inputs will turn
off all four transistors of the output H-
bridge, which results in a rapidly
decreasing output current to zero.
V
R
(Reference) inputs
The Vref inputs of the PBL 3775/1 have
a voltage divider with a ratio of 1 to 10
to reduce the external reference voltage
to an adequate level. The divider
consists of closely matched resistors.
Nominal input reference voltage is 5 V.
Interference
Due to the switching operation of
PBL 3775/1, noise and transients are
generated and might be coupled into
adjacent circuitry. To reduce potential
interference there are a few basic rules
to follow:
• Use separate ground leads for power
ground (the ground connection of R
S
),
the ground leads of PBL 3775/1, and
the ground of external analog and
digital circuitry. The grounds should
be connected together close to the
GND pins of PBL 3775/1.
• Decouple the supply voltages close to
the PBL 3775/1 circuit. Use a ceramic
capacitor in parallel with an electrolytic
type for both V
CC
and V
MM
. Route the
power supply lines close together.
• Do not place sensitive circuits close to
the driver. Avoid physical current
loops, and place the driver close to
both the motor and the power supply
connector. The motor leads could
preferably be twisted or shielded.
Motor selection
The PBL 3775/1 is designed for two-
phase bipolar stepper motors, i.e.
motors that have only one winding per
phase.
The chopping principle of the PBL
3775/1 is based on a constant
frequency and a varying duty cycle.
This scheme imposes certain
restrictions on motor selection. Uns-
table chopping can occur if the
chopping duty cycle exceeds approxi-
mately 50 %. See figure 3 for
definitions. To avoid this, it is necessary
to choose a motor with a low winding
resistance and inductance, i.e. windings
with a few turns.
It is not possible to use a motor that
is rated for the same voltage as the
actual supply voltage. Only rated
current needs to be considered. Typical
motors to be used together with the
PBL 3775/1 have a voltage rating of 1
to 6 V, while the supply voltage usually
ranges from 12 to 40 V.
V
CC
+
(+5 V)
+
4.7
µF
4x
10 kΩ
V
MM
0.1
µF
12
4
V
MM1
0.1
µF
19
V
MM2
10
µF
16
Direction
Step
Half/Full
Step
6
7
10
11
8
V
DIR
STEP
HSM
INH
Ø
P
B1
B
GND
CC
P
A1
4
V
9
10
7
Phase
1
Dis
1
V
R1
Phase
2
Dis
2
V
R2
RC GND
11
12 kΩ
CC
M
A1
3
PBD
3517/1
2
M
B1
1
20
PBL 3775/1
M
A2
14
13
16
9
Ø
A
M
B2
C
1
8
E
1
2
C
2
15
E
2
21
22
3
5, 6,
17, 18
STEPPER
MOTOR
4 700 pF
RS
RS
1.0
Ω
1.0
Ω
Pin numbers refer
to DIL package.
GND (V
MM
)
GND (V
CC
)
Figure 7. Half stepping system where PBD 3517/1 is used as controller circuit in order
to generate the necessary sequence to the PBL 3775/1.
6
ERICSSON [ ERICSSON ]
