March 2000
PBL 386 40/2
Subscriber Line
Interface Circuit
Description
The PBL 386 40/2 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated
circuit for use in Digital Loop Carrier, FITL and other telecommunications equipment.
The PBL 386 40/2 has been optimized for low total line interface cost and a high
degree of flexibility in different applications.
The PBL 386 40/2 emulates resistive loop feed, programmable between 2x50
Ω
and 2x900
Ω,
with short loop current limiting adjustable to max 45 mA. In the current
limited region the loop feed is nearly constant current with a slight slope correspond-
ing to 2x30 kΩ.
A second, lower battery voltage may be connected to the device to reduce short
loop power dissipation. The SLIC automatically switches between the two battery
supply voltages without need for external components or external control.
The SLIC incorporates loop current, ground key and ring trip detection functions.
The PBL 386 40/2 is compatible with both loop and ground start signaling.
Two- to four-wire and four- to two-wire voice frequency (VF) signal conversion is
accomplished by the SLIC in conjunction with either a conventional CODEC/filter or
with a programmable CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable
two-wire impedance, complex or real, is set by a simple external network.
Longitudinal voltages are suppressed by a feedback loop in the SLIC and the
longitudinal balance specifications meet the DLC requirements.
The PBL 386 40/2 package options are 24-pin SSOP package, 24-pin SOIC and
28-pin PLCC.
Key Features
• 24-pin SSOP package
• High and low battery with automatic
switching
• 65 mW on-hook power dissipation in
active state
• On-hook transmission
• Long loop battery feed tracks Vbat for
maximum line voltage
• Only +5 V feed in addition to battery
• Selectable transmit gain (1x or 0.5x)
• No power-up sequence
• Programmable signal headroom
• 43V open loop voltage @ -48V battery
feed
• Constant loop voltage for line leakage
<5 mA (RLeak ~ >10 kΩ @ -48V)
• Full longitudinal current capability
during on-hook state
• Analog over temperature protection
permits transmission while the
protection circuit is active
• Line voltage measurement
Ring Relay
Driver
RRLY
• Polarity reversal
• Ground key detector
• Tip open state with ring ground
detector
• -40°C to +85°C ambient temperature
range
DT
DR
TIPX
RINGX
HP
Ring Trip
Comparator
Input
Decoder
and
Control
C1
C2
C3
DET
Ground Key
Detector
VCC
38
VBAT2
VBAT
Off-hook
Detector
PLD
REF
PBL
AGND
BGND
VF Signal
Transmission
VTX
RSN
386
40/2
24-pin SOIC, 24-pin SSOP, 28-pin PLCC
PTG
Figure 1. Block diagram.
1
38 PB
6 L
40
/2
LP
P
B
L
6
40
Two-wire
Interface
Line Feed
Controller
and
Longitudinal
Signal
Suppression
POV
PSG
PLC
/2
ERICSSON [ ERICSSON ]
