ESMT
Flash
FEATURES
Single supply voltage 2.7~3.6V
Standard, Dual and Quad SPI
(Preliminary)
F25L32QA
3V Only 32 Mbit Serial Flash Memory
with Dual and Quad
Speed
- Read max frequency: 33MHz
- Fast Read max frequency: 50MHz / 86MHz/ 100MHz
- Fast Read Dual/Quad max frequency: 50MHz / 100MHz
(100MHz / 172MHz/ 200MHz equivalent Dual SPI;
200MHz / 344MHz/ 400MHz equivalent Quad SPI)
Low power consumption
- Active current: 35 mA
- Standby current: 30
μ
A
- Deep Power Down current: 5
μ
A
Reliability
- 100,000 typical program/erase cycles
- 20 years Data Retention
Program
- Byte programming time: 7
μ
s (typical)
- Page programming time: 1.5 ms (typical)
Erase
- Chip erase time 25 sec (typical)
- Block erase time 1 sec (typical)
- Sector erase time 90 ms (typical)
Page Programming
- 256 byte per programmable page
Auto Address Increment (AAI) WORD Programming
- Decrease total chip programming time over Byte Program
operations
Lockable 2K bytes OTP security sector
SPI Serial Interface
- SPI Compatible: Mode 0 and Mode 3
End of program or erase detection
Write Protect (
WP
)
Hold Pin ( HOLD )
All Pb-free products are RoHS-Compliant
ORDERING INFORMATION
Product ID
F25L32QA –50PAG
F25L32QA –86PAG
F25L32QA –100PAG
F25L32QA –50PHG
F25L32QA –86PHG
F25L32QA –100PHG
Speed
50MHz
86MHz
100MHz
50MHz
86MHz
100MHz
Package
8 lead SOIC
8 lead SOIC
8 lead SOIC
16 lead SOIC
16 lead SOIC
16 lead SOIC
200mil
200mil
200mil
300mil
300mil
300mil
Comments
Pb-free
Pb-free
Pb-free
Pb-free
Pb-free
Pb-free
GENERAL DESCRIPTION
The F25L32QA is a 32Megabit, 3V only CMOS Serial Flash
memory device. The device supports the standard Serial
Peripheral Interface (SPI), and a Dual/Quad SPI. ESMT’s
memory devices reliably store memory data even after 100,000
programming and erase cycles.
The memory array can be organized into 16,384 programmable
pages of 256 byte each. 1 to 256 byte can be programmed at a
time with the Page Program instruction. The device also can be
programmed to decrease total chip programming time with Auto
Address Increment (AAI) programming.
The device features sector erase architecture. The memory array
is divided into 1024 uniform sectors with 4K byte each; 64
uniform blocks with 64K byte each. Sectors can be erased
individually without affecting the data in other sectors. Blocks can
be erased individually without affecting the data in other blocks.
Whole chip erase capabilities provide the flexibility to revise the
data in the device. The device has Sector, Block or Chip Erase
but no page erase.
The sector protect/unprotect feature disables both program and
erase operations in any combination of the sectors of the
memory.
Elite Semiconductor Memory Technology Inc.
Publication Date: Jan. 2009
Revision: 0.2
1/42
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
