EFST
Command
Reset (5)
Read (4)
Program
Word
Byte
Word
Byte
Word
Byte
Bus
Cycles
1
1
4
4
6
6
6
6
1
1
1st Bus
Cycle
Addr
XXXH
RA
555H
Data
F0H
RD
AAH
2nd Bus
Cycle
Addr
-
-
2AAH
555H
2AAH
555H
2AAH
555H
-
-
Data
-
-
55H
55H
55H
55H
55H
55H
-
-
3rd Bus
Cycle
Addr
-
-
555H
AAAH
555H
AAAH
555H
AAAH
-
-
F49L400UA/F49L400BA
Table 5. F49L400UA/F49L400BA Software Command Definitions
4th Bus
Cycle
Addr
-
-
PA
PA
555H
Data
-
-
PD
PD
AAH
2AAH
555H
2AAH
555H
-
-
55H
55H
55H
55H
-
-
555H
AAAH
SA
SA
-
-
10H
10H
30H
30H
-
-
5th Bus
Cycle
Addr
-
-
Data
-
-
6th Bus
Cycle
Addr
-
-
Data
-
-
Data
-
-
A0H
A0H
80H
80H
80H
80H
-
-
AAAH AAH
555H
AAH
Chip Erase
AAAH AAH
555H
AAH
AAAH AAH
555H
AAH
Sector Erase
Sector Erase
Suspend (6)
AAAH AAH
XXXH
XXXH
B0H
30H
AAAH AAH
-
-
-
-
Sector Erase Resume
(7)
Auto-select
Notes:
See Table 6.
1. X = don’t care
RA = Address of memory location to be read.
RD = Data to be read at location RA.
PA = Address of memory location to be programmed.
PD = Data to be programmed at location PA.
SA = Address of the sector.
2. Except Read command and Auto-select command, all command bus cycles are write operations.
3. The system should generate the following address patterns: 555H or 2AAH to address A10~A0 in word mode
/ AAAH or 555H to address A10~A-1 in byte mode.
4. Address bits A17–A11 are don’t cares.
5. No command cycles required when reading array data.
6. The Reset command is required to return to reading array data when device is in the auto-select mode, or if
DQ5 goes high(while the device is providing status data).
7. The system may read and program in non-erasing sectors, or enter the auto-select mode, when in the Erase
Suspend mode. The Erase Suspend command is valid only during a sector erase operation.
8. The Erase Resume command is valid only during the Erase Suspend mode.
Elite Flash Storage Technology Inc.
Publication Date : Sep. 2006
Revision: 1.1
10/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
