ESMT
PIN
DQM0~3
DQ0 ~ DQ31
V
DD
/ V
SS
V
DDQ
/ V
SSQ
N.C
NAME
Data Input / Output Mask
Data Input / Output
Power Supply / Ground
Data Output Power / Ground
No Connection
M12L128324A
INPUT FUNCTION
Makes data output Hi-Z, t
SHZ
after the clock and masks the output.
Blocks data input when DQM active.
Data inputs / outputs are multiplexed on the same pins.
Power and ground for the input buffers and the core logic.
Isolated power supply and ground for the output buffers to provide
improved noise immunity.
This pin is recommended to be left No Connection on the device.
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to V
SS
Voltage on V
DD
supply relative to V
SS
Storage temperature
Power dissipation
Short circuit current
Note :
Symbol
V
IN
, V
OUT
V
DD
, V
DDQ
T
STG
P
D
I
OS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ +150
1
50
Unit
V
V
°
C
W
mA
Permanent device damage may occur if ABSOLUTE MAXIMUM RATING are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITION
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= 0 to 70 °C )
Parameter
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Output leakage current
Note:
Symbol
V
DD
, V
DDQ
V
IH
V
IL
V
OH
V
OL
I
IL
I
OL
Min
3.0
2.0
-0.3
2.4
-
-5
-5
Typ
3.3
3.0
0
-
-
-
-
Max
3.6
V
DD
+0.3
0.8
-
0.4
5
5
Unit
V
V
V
V
V
1
2
I
OH
= -2mA
I
OL
= 2mA
3
4
Note
μ
A
μ
A
1. V
IH
(max) = 4.6V AC for pulse width
≤
10ns acceptable.
2. V
IL
(min) = -1.5V AC for pulse width
≤
10ns acceptable.
3. Any input 0V
≤
VIN
≤
V
DD
+ 0.3V, all other pins are not under test = 0V.
4. Dout is disabled , 0V
≤
V
OUT
≤
V
DD
.
Elite Semiconductor Memory Technology Inc.
Publication Date: Mar. 2006
Revision: 1.2
5/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
