ESMT
AC OPERATING TEST CONDITIONS
(V
DD
= 3.3V
±
0.3V
，
T
A
= 0 to 70
°
C
)
Parameter
Input levels (Vih/Vil)
Input timing measurement reference level
Input rise and fall-time
Output timing measurement reference level
Output load condition
Value
2.4/0.4
1.4
tr/tf = 1/1
1.4
See Fig. 2
M12L2561616A
Unit
V
V
ns
V
(Fig. 1) DC Output Load Circuit
(Fig. 2) AC Output Load Circuit
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Parameter
Row active to row active delay
RAS to CAS delay
Row precharge time
Row active time
@ Operating
Row cycle time
@ Auto refresh
Symbol
-6
t
RRD(min)
t
RCD(min)
t
RP(min)
t
RAS(min)
t
RAS(max)
t
RC(min)
t
RFC(min)
t
CDL(min)
t
RDL(min)
t
BDL(min)
t
REF(max)
60
60
1
2
1
64
12
18
18
42
100
63
70
Version
-7
14
20
20
45
ns
ns
ns
ns
us
ns
ns
t
CK
t
CK
t
CK
ms
1
1,5
2
2
2
6
1
1
1
1
Unit
Note
Last data in to col. address delay
Last data in to row precharge
Last data in to burst stop
Refresh period (8,192 rows)
Elite Semiconductor Memory Technology Inc.
Publication Date: Aug. 2007
Revision: 1.2
5/44
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
