M12L64164A-7TG2Y 参数 Datasheet PDF下载

ESMT

SDRAM

M12L64164A (2Y)

1M x 16 Bit x 4 Banks

Synchronous DRAM

FEATURES

JEDEC standard 3.3V power supply

LVTTL compatible with multiplexed address

Four banks operation

MRS cycle with address key programs

- CAS Latency (2 & 3)

- Burst Length (1, 2, 4, 8 & full page)

- Burst Type (Sequential & Interleave)

All inputs are sampled at the positive going edge of the

system clock

DQM for masking

Auto & self refresh

64ms refresh period (4K cycle)

- 15.6

μ

s refresh interval

ORDERING INFORMATION

Product ID

M12L64164A-5TG2Y

M12L64164A-6TG2Y

M12L64164A-7TG2Y

M12L64164A-5BG2Y

M12L64164A-6BG2Y

M12L64164A-7BG2Y

Max Freq.

200MHz

166MHz

143MHz

200MHz

166MHz

143MHz

Package

54 TSOP II

54 TSOP II

54 TSOP II

54 VBGA

54 VBGA

54 VBGA

Comments

Pb-free

Pb-free

Pb-free

Pb-free

Pb-free

Pb-free

GENERAL DESCRIPTION

The M12L64164A is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by

16 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on

every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same

device to be useful for a variety of high bandwidth, high performance memory system applications.

PIN CONFIGURATION (TOP VIEW)

(TSOPII 54L, 400milX875mil Body, 0.8mm Pin Pitch)

BALL CONFIGURATION (TOP VIEW)

(BGA54, 8mmX8mmX1mm Body, 0.8mm Ball Pitch)

V

DD

D Q0

V

D DQ

D Q1

D Q2

V

S SQ

D Q3

D Q4

V

D D Q

D Q5

D Q6

V

S SQ

DQ 7

V

DD

LD QM

WE

C AS

R AS

CS

BA0

BA1

A

1 0

/AP

A

0

A

1

A

2

A

3

V

DD

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

V

SS

DQ15

V

S SQ

DQ14

DQ13

V

DDQ

DQ12

DQ11

V

S SQ

DQ10

DQ9

V

DDQ

DQ8

V

SS

NC

U DQ M

CLK

CKE

NC

A

11

A

9

A

8

A

7

A

6

A

5

A

4

V

SS

1

A

VSS

2

DQ15

3

VSSQ

4

5

6

7

VDDQ

8

DQ0

9

VDD

B

DQ14

DQ13

VDDQ

VSSQ

DQ2

DQ1

C

DQ12

DQ11

VSSQ

VDDQ

DQ4

DQ3

D

DQ10

DQ9

VDDQ

VSSQ

DQ6

DQ5

E

DQ8

NC

VSS

VDD

LDQM

DQ7

F

UDQM

CLK

CKE

CAS

RAS

WE

G

NC

A11

A9

BA0

BA1

CS

H

A8

A7

A6

A0

A1

A10

J

VSS

A5

A4

A3

A2

VDD

Elite Semiconductor Memory Technology Inc.

Publication Date: May 2012

Revision: 1.1

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