ESMT
2. Bank active & read/write are controlled by BA.
M52D32162A
*Note:
1. All inputs expect CKE & DQM can be don’t care when CS is high at the CLK high going edge.
BA
0
1
Active & Read/Write
Bank A
Bank B
3. Enable and disable auto precharge function are controlled by A10/AP in read/write command.
A10/AP
0
BA
0
1
0
1
Operation
Disable auto precharge, leave bank A active at end of burst.
Disable auto precharge, leave bank B active at end of burst.
Enable auto precharge, precharge bank A at end of burst.
Enable auto precharge, precharge bank B at end of burst.
1
4. A10/AP and BA control bank precharge when precharge command is asserted.
A10/AP
0
0
1
BA
0
1
X
precharge
Bank A
Bank B
Both Banks
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Jul. 2009
Revision
:
1.6
12/32
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
