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M52S64322A 参数 Datasheet PDF下载

M52S64322A图片预览
型号: M52S64322A
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×32位×4手机银行同步DRAM [512K x 32 Bit x 4 Banks Mobile Synchronous DRAM]
分类和应用: 动态存储器手机
文件页数/大小: 47 页 / 1234 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT
Mobile SDRAM
M52S64322A
512K x 32 Bit x 4 Banks
Mobile Synchronous DRAM
FEATURES
2.5V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
- CAS Latency (2 & 3)
- Burst Length (1, 2, 4, 8 & full page)
- Burst Type (Sequential & Interleave)
EMRS cycle with address
All inputs are sampled at the positive going edge of the
system clock
Special function support
-
PASR (Partial Array Self Refresh)
-
TCSR (Temperature Compensated Self Refresh)
-
DS (Driver Strength)
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
ORDERING INFORMATION
PRODUCT NO.
M52S64322A-7.5BG
M52S64322A-10BG
MAX
FREQ.
133MHz
100MHz
PACKAGE
90 Ball FBGA
90 Ball FBGA
Comments
Pb-free
Pb-free
GENERAL DESCRIPTION
The M52S64322A is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by
32 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on
every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the
same device to be useful for a variety of high bandwidth, high performance memory system applications.
PIN ASSIGNMENT
90 Ball FBGA
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
2
3
4
5
6
7
8
9
DQ26 DQ24 VSS
DQ28 VDDQ VSSQ
VSSQ DQ27 DQ25
VSSQ DQ29 DQ30
VDDQ DQ31
VSS DQM3
A4
A7
CLK
DQM1
A5
A8
CKE
NC
NC
A3
A6
NC
A9
NC
VSS
VDD DQ23 DQ21
VDDQ VSSQ DQ19
DQ22 DQ20 VDDQ
DQ17 DQ18 VDDQ
NC
A2
A10
NC
BA0
CAS
VDD
DQ6
DQ1
DQ16 VSSQ
DQM2 VDD
A0
BA1
CS
WE
A1
NC
RAS
DQM0
VDDQ DQ8
DQ7 VSSQ
DQ5 VDDQ
DQ3 VDDQ
VSSQ DQ10 DQ9
VSSQ DQ12 DQ14
DQ11 VDDQ VSSQ
DQ13 DQ15 VSS
VDDQ VSSQ DQ4
VDD
DQ0
DQ2
Elite Semiconductor Memory Technology Inc.
Publication Date: Aug. 2009
Revision: 1.3
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