IW4013B
Description
The IW4013B consists of two identical, independent data-type flip-flops. Each flip-flop has independent data,
set, reset, and clock inputs and
Q
and
Q
outputs. These devices can be used for shift register applications,
and, by connecting
Q
output to the data input,for counter and toggle applications. The logic level present at the
Q
output during the positive- going
Input is transferred to the
Transition of the clock pulse. Setting or
Dresetting is independent of
clock and is accomplished by a high level on the set or reset line,respectively.
the
Features
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 u A at 18 V over full package-
temperature range ;100 nA at 18 V and 25 C
Noise margin (over full package temperature range):
1.0 V min
@
5.0 V supply
2.0 V min
@
10.0 V supply
2.5 V min
@
15.0 V supply
14
1
SOP
14
14
1
DIP
14
Package
Logic Diagram
Set 1
Pin Assignment
Q1
Vcc
6
5
3
1
Q1
Q1
Clock 1
Reset 1
Q2
Q2
Clock 2
Reset 2
Data 2
Set 2
Data
1
Clock 1
Reset
1
Set 2
Data 1
Set 1
2
Q1
GND
4
8
13
Q2
Function Table
Inputs
Clock Data Reset Set
L
H
X
X
X
X
X
X
X
L
L
L
H
L
H
L
L
L
L
H
H
Q2
Data 2
Clock 2
9
11
10
Outputs
Q
L
H
Q
L
H
H
Q
H
L
Q
H
L
H
12
Reset 2
PIN 14 =
V
DD
PIN 7
=
X = don ' t care
BEIJING ESTEK ELECTRONICS CO.,LTD
1
ESTEK [ Estek Electronics Co. Ltd ]
