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K24C160-DCR-A 参数 Datasheet PDF下载

K24C160-DCR-A图片预览
型号: K24C160-DCR-A
PDF下载: 下载PDF文件 查看货源
内容描述: 8引脚PDIP , 8引脚SOP和8引脚TSSOP封装 [8-lead PDIP, 8-lead SOP and 8-lead TSSOP Packages]
分类和应用: 光电二极管
文件页数/大小: 13 页 / 1114 K
品牌: ESTEK [ Estek Electronics Co. Ltd ]
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24C02 / 24C04 / 24C08 / 24C16
Device Operation
CLOCK and DATA TRANSITIONS:
The SDA pin is normally pulled high with an external device. Data on the SDA
pin may change only during SCL low time periods (see to Figure 1 on page 4). Data changes during SCL high periods
will indicate a start or stop condition as defined below.
START CONDITION:
A high-to-low transition of SDA with SCL high is a start condition which must precede any other
command (see to Figure 2 on page 4).
STOP CONDITION:
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop
command will place the EEPROM in a standby power mode (see Figure 2 on page 4).
ACKNOWLEDGE:
All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a "0" to acknowledge that it has received each word. This happens during the ninth clock cycle.
STANDBY MODE:
The
24C02/ 24C04/ 24C08/ 24C16 features a low-power standby mode which is enabled: (a)
upon power-up and (b) after the receipt of the STOP bit and the completion of any internal operations
MEMORY RESET:
After an interruption in protocol, power loss or system reset, any two-wire part can be reset by
following these steps:
1.
2.
3.
Clock up to 9 cycles.
Look for SDA high in each cycle while SCL is high.
Create a start condition.
¡
Figure 1: Data Validity
SDA
SCL
DATA STABLE
DATA
CHANGE
DATA STABLE
¡
Figure 2: Start and Stop Definition
SDA
SCL
START
STOP
BEIJING ESTEK ELECTRONICS CO.,LTD
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