24C32 / 24C64
Pin Descriptions
DEVICE/PAGE ADDRESSES (A2, A1 and A0):
The A2, A1 and A0 pins are device address inputs that are hard
wired for the
24C32/ 24C64. Eight 32K/64K devices may be addressed on a single bus system (device addressing is
discussed in detail under the Device Addressing section).
SERIAL DATA (SDA):
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open- collector devices.
SERIAL CLOCK (SCL):
The SCL input is used to positive edge clock data into each EEPROM device and negative
edge clock data out of each device.
WRITE PROTECT (WP):
The
24C32/ 24C64 has a Write Protect pin that provides hardware data protection. The
Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is
connected to V
CC
, the write protection feature is enabled and operates as shown in the following Table 2.
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Table 2: Write Protect
WP Pin Status
Part of the Array Protected
24C32
Full (32K) Array
Normal Read / Write Operations
24C64
Full (64K) Array
At V
CC
At GND
Memory Organization
24C32, 32K SERIAL EEPROM:
Internally organized with 128 pages of 32 bytes each, the 32K requires an 12-bit
data word address for random word addressing.
24C64, 64K SERIAL EEPROM:
Internally organized with 256 pages of 32 bytes each, the 64K requires a 13-bit
data word address for random word address
BEIJING ESTEK ELECTRONICS CO.,LTD
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ESTEK [ Estek Electronics Co. Ltd ]
