EtronTech
Features
Fast access time: 4.5/5/5/5.5/6.5/7.5 ns
Fast clock rate: 200/183/166/143/125/100 MHz
Self refresh mode: standard and low power
Internal pipelined architecture
512K word x 16-bit x 2-bank
Programmable Mode registers
- CAS# Latency: 1, 2, or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: interleaved or linear burst
- Burst stop function
•
Individual byte controlled by LDQM and UDQM
•
Auto Refresh and Self Refresh
•
4096 refresh cycles/64ms
•
CKE power down mode
•
JEDEC standard +3.3V
±
0.3V power supply
•
Interface: LVTTL
•
50-pin 400 mil plastic TSOP II package
•
60-ball, 6.4x10.1mm VFBGA package
•
Lead Free Package available for both TSOP II
and VFBGA
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•
•
•
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EM636165
Preliminary (Rev.2.7, Mar./2006)
Ordering Information
Part Number
EM636165TS/VE-5
EM636165TS/BE-5G
EM636165TS/VE-55
EM636165TS/BE-55G
EM636165TS/VE-6
EM636165TS/BE-6G
EM636165TS/VE-7
EM636165TS/BE-7G
EM636165TS/VE-7L
EM636165TS/BE-7LG
EM636165TS/VE-8
EM636165TS/BE-8G
EM636165TS/VE-10
EM636165TS/BE-10G
G : indicates Lead Free Package
Frequency
200MHz
200MHz
183MHz
183MHz
166MHz
166MHz
143MHz
143MHz
143MHz
143MHz
125MHz
125MHz
100MHz
100MHz
Package
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
TSOP II, VFBGA
1Mega x 16 Synchronous DRAM (SDRAM)
Key Specifications
EM636165
t
CK3
t
RAS
t
AC3
t
RC
Clock Cycle time(min.)
Row Active time(max.)
Access time from CLK(max.)
Row Cycle time(min.)
-5/55/6/7/7L/8/10
5/5.5/6/7/7/8/10ns
30/32/36/42/42/48/60 ns
4.5/5/5/5.5/5.5/6.5/7.5 ns
48/48/54/63/63/72/90 ns
Etron Technology, Inc.
No. 6, Technology Road V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C
TEL: (886)-3-5782345
FAX: (886)-3-5778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.
ETRON [ ETRON TECHNOLOGY, INC. ]
