EtronTech
Features
Clock rate: 200/183/166/143/125/100 MHz
Fully synchronous operation
Internal pipelined architecture
Four internal banks (512K x 32bit x 4bank)
Programmable Mode
- CAS# Latency: 2 or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: interleaved or linear burst
- Burst-Read-Single-Write
•
Burst stop function
•
Individual byte controlled by DQM0-3
•
Auto Refresh and Self Refresh
•
4096 refresh cycles/64ms
•
Single +3.3V
±
0.3V power supply
•
Interface: LVTTL
•
Package: 400 x 875 mil, 86 Pin TSOP II, 0.50mm
pin pitch
•
Lead Free Package available
•
•
•
•
•
EM638325
2M x 32 Synchronous DRAM (SDRAM)
Preliminary (Rev 1.4 October/2005)
Pin Assignment (Top View)
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
NC
VDD
DQM0
/WE
/CAS
/RAS
/CS
NC
BS0
BS1
A10/AP
A0
A1
A2
DQM2
VDD
NC
DQ16
VSSQ
DQ17
DQ18
VDDQ
DQ19
DQ20
VSSQ
DQ21
DQ22
VDDQ
DQ23
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
VSS
DQ15
VSSQ
DQ14
DQ13
VDDQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VDDQ
DQ8
NC
VSS
DQM1
NC
NC
CLK
CKE
A9
A8
A7
A6
A5
A4
A3
DQM3
VSS
NC
DQ31
VDDQ
DQ30
DQ29
VSSQ
DQ28
DQ27
VDDQ
DQ26
DQ25
VSSQ
DQ24
VSS
Ordering Information
Part Number
Leaded / Lead Free Package
EM638325TS-5/-5G
EM638325TS-5.5/-5.5G
EM638325TS-6/-6G
EM638325TS-7/-7G
EM638325TS-8/-8G
EM638325TS-10/-10G
200MHz
183MHz
166MHz
143MHz
125MHz
100MHz
TSOP II
TSOP II
TSOP II
TSOP II
TSOP II
TSOP II
Frequency
Package
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C
TEL: (886)-3-5782345
FAX: (886)-3-5778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.