FLC087XP
GaAs FET & HEMT Chips
FEATURES
•
•
•
•
High Output Power: P1dB = 28.5dBm(Typ.)
High Gain: G1dB = 7.0dB(Typ.)
High PAE:
η
add = 31.5%(Typ.)
Proven Reliability
Drain
DESCRIPTION
The FLC087XP chip is a power GaAs FET that is designed for general
purpose applications in the C-Band frequency range as it provides
superior power, gain, and efficiency.
Fujitsu’s stringent Quality Assurance Program assures the
highest reliability and consistent performance.
ABSOLUTE MAXIMUM RATING (Ambient Temperature Ta=25°C)
Item
Drain-Source Voltage
Gate-Source Voltage
Total Power Dissipation
Storage Temperature
Channel Temperature
Symbol
VDS
VGS
Ptot
Tstg
Tch
Condition
Rating
15
-5
Tc = 25°C
4.16
-65 to +175
175
Unit
V
V
W
°C
°C
Gate
Source
Source
Fujitsu recommends the following conditions for the reliable operation of GaAs FETs:
1. The drain-source operating voltage (VDS) should not exceed 10 volts.
2. The forward and reverse gate currents should not exceed 4.8 and -0.5 mA respectively with
gate resistance of 400Ω.
3. The operating channel temperature (Tch) should not exceed 145°C.
ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25°C)
Item
Saturated Drain Current
Transconductance
Pinch-off Voltage
Gate Source Breakdown Voltage
Output Power at 1dB
Gain Compression Point
Power Gain at 1dB
Gain Compression Point
Power-added Efficiency
Thermal Resistance
Symbol
IDSS
gm
Vp
VGSO
P1dB
G1dB
η
add
Rth
Channel to Case
VDS = 10V
IDS
≈
0.6IDSS
f = 8GHz
Test Conditions
VDS = 5V, VGS = 0V
VDS = 5V, IDS = 200mA
VDS = 5V, IDS = 15mA
IGS = -15µA
Min.
-
75
-1.0
-5
27.5
6.0
-
-
Limit
Typ. Max.
300
150
-2.0
-
28.5
7.0
31.5
25
450
-
-3.5
-
-
-
-
36
Unit
mA
mS
V
V
dBm
dB
%
°C/W
Note:
RF parameter sample size 10pcs. criteria (accept/reject)=(2/3)
The chip must be enclosed in a hermetically sealed environment for optimum performance and reliability.
Edition 1.3
July 1999
1
EUDYNA [ EUDYNA DEVICES INC ]
