FLM5053-8F
C-Band Internally Matched FET
FEATURES
•
•
•
•
•
•
High Output Power: P1dB = 39.5dBm (Typ.)
High Gain: G1dB = 9.5dB (Typ.)
High PAE:
η
add = 36% (Typ.)
Low IM3 = -46dBc@Po = 28.5dBm
Broad Band: 5.0 ~ 5.3GHz
Impedance Matched Zin/Zout = 50Ω
DESCRIPTION
The FLM5053-8F is a power GaAs FET that is internally matched for
standard communication bands to provide optimum power and gain in a
50 ohm system.
Eudyna’s stringent Quality Assurance Program assures the highest
reliability and consistent performance.
ABSOLUTE MAXIMUM RATING (Ambient Temperature Ta=25°C)
Item
Drain-Source Voltage
Gate-Source Voltage
Total Power Dissipation
Storage Temperature
Channel Temperature
Symbol
VDS
VGS
PT
Tstg
Tch
Tc = 25°C
Condition
Rating
15
-5
42.8
-65 to +175
175
Unit
V
V
W
°C
°C
Eudyna recommends the following conditions for the reliable operation of GaAs FETs:
1. The drain-source operating voltage (VDS) should not exceed 10 volts.
2. The forward and reverse gate currents should not exceed 32.0 and -4.4 mA respectively with
gate resistance of 100Ω.
ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25°C)
Item
Saturated Drain Current
Transconductance
Pinch-off Voltage
Gate Source Breakdown Voltage
Output Power at 1dB G.C.P.
Power Gain at 1dB G.C.P.
Drain Current
Power-added Efficiency
Gain Flatness
3rd Order Intermodulation
Distortion
Thermal Resistance
Channel Temperature Rise
CASE STYLE:
IB
Symbol
IDSS
gm
Vp
VGSO
P1dB
G1dB
Idsr
η
add
∆G
IM3
Rth
∆T
ch
f = 5.3 GHz,
∆f
= 10 MHz
2-Tone Test
Pout = 28.5dBm S.C.L.
Channel to Case
10V x Idsr x Rth
Test Conditions
VDS = 5V, VGS = 0V
VDS = 5V, IDS = 2200mA
VDS = 5V, IDS = 180mA
IGS = -180µA
VDS =10V,
IDS = 0.55 IDSS (Typ.),
f = 5.0 ~ 5.3 GHz,
ZS=ZL= 50 ohm
Min.
-
-
-1.0
-5.0
38.5
8.5
-
-
-
-44
-
-
Limit
Typ. Max.
3900 5850
-
2000
-2.0
-
39.5
9.5
36
-
-46
3.0
-
-3.5
-
-
-
-
±0.6
-
3.5
80
Unit
mA
mS
V
V
dBm
dB
mA
%
dB
dBc
°C/W
°C
2200 2600
G.C.P.: Gain Compression Point, S.C.L.: Single Carrier Level
Edition 1.2
November 2004
1
EUDYNA [ EUDYNA DEVICES INC ]
