EUA5202
Pin Configurations
Package
Pin Configurations
TSSOP-24 with Thermal
Pad, exposure on the bottom
of the package
Pin Description
PIN
PIN
I/O
DESCRIPTION
HP/ LINE
LBYPASS
LHPIN
LLINE IN
LOUT+
LOUT-
GND/HS
LV
DD
MUTE IN
MUTE OUT
NC
RBYPASS
RHPIN
RLINEIN
ROUT+
ROUT-
RV
DD
SE/BTL
SHUTDOWN
T
J
16
6
5
4
3
10
1,12,13,
24
7
11
9
17,23
19
20
21
22
15
18
14
8
2
I
I
I
O
O
I
I
O
Input MUX control input, hold high to select LHP IN or RHP IN (5, 20), hold
low to select LLINE IN or RLINE IN (4, 21)
Tap to voltage divider for left channel internal mid-supply bias
Left channel headphone input, selected when
HP/LINE terminal (16) is held
high
Left channel line input, selected when HP/LINE terminal (16) is held low
Left channel + output in BTL mode, + output in SE mode
Left channel - output in BTL mode, high-impedance state in SE mode
Ground connection for circuitry, directly connected to thermal pad
Supply voltage input for left channel and for primary bias circuits
Mute all amplifiers, hold low for normal operation, hold high to mute
Follows MUTE IN terminal (11), provides buffered output
No internal connection
Tap to voltage divider for right channel internal mid-supply bias
Right channel headphone input, selected when HP/LINE terminal (16) is held
high
Right channel line input, selected when HP/LINE terminal (16) is held low
Right channel + output in BTL mode, + output in SE mode
Right channel - output in BTL mode, high-impedance state in SE mode
Supply voltage input for high channel
Hold low foe BTL mod, hold high for SE mode
Places entire IC in shutdown mode when held high, I
DD
=5µA
Sources a current proportional to the junction temperature. This terminal should
be left unconnected during normal operation.
I
I
O
O
I
I
I
O
DS5202 Ver 1.6 May. 2005
3
EUTECH [ EUTECH MICROELECTRONICS INC ]
