2A Sink/Source Bus Termination
Regulator
DESCRIPTION
The EUP7171 is a high performance linear regulator
designed to provide power for termination of a DDR
memory bus. It significantly reduces parts count, board
space and overall system cost over previous switching
solutions.
The EUP7171 contains a high-speed operational
amplifier to provide excellent response to load transients.
It also has an independent power source pin (VCNTL)
for achieving better output driving capability. The
regulator can both sink and source up to 2A current. The
output termination voltage can be tightly regulated to
track 1/2 V
DDQ
by two external voltage divider resistors.
The EUP7171, used in conjunction with series
termination resistors, provides an excellent voltage
source for active termination schemes of high speed
transmission lines as those seen in high speed memory
buses. A typical DDR memory system is seen in Figure 1.
EUP7171
FEATURES
Compatible with DDR-I (1.25VTT) or DDR-II
(0.9VTT) SDRAM Systems.
Low Quiescent Current (1.1mA)
Fast Transient Response Time
Capable of Sourcing and Sinking 2A
Adjustable VOUT by Two External Resistors
Current Limiting Protection
Over-Temperature Protection
High Accuracy Output Voltage at Full-Load
Low External Component Count
Available in SOP-8 Exposed Pad Package
RoHS Compliant and 100% Lead (Pb)-Free
APPLICATIONS
DDR SDRAM Termination Voltage
Simplified System Diagram
Figure1.
DS7171 Ver1.0 Mar. 2005
1