CMOS
20 MSPS, 8-Bit, High Speed
Analog-to-Digital Converter
FEATURES
·
·
·
·
·
·
·
·
·
·
8-Bit Resolution
20 MHz Sampling Rate
DNL = +1/2 LSB, INL = +1 LSB (typ)
Internal S/H Function
Single Supply: 5 V
V
IN
DC Range: 0 V to V
DD
V
REF
DC Range: 1 V to V
DD
Low Power: 85 mW typ. (excluding reference)
Latch-Up Free
ESD Protection: 2000 V Minimum
MP8775
March 1999-4
·
Power Down Available: MP8776
·
3 V Version: MP87L75
·
Small 20 Pin SOIC Package
APPLICATIONS
·
·
·
·
·
Digital Color Copiers
Cellular Telephones
CCD’s Based Systems
Hardware Scanners
Video Capture Boards
GENERAL DESCRIPTION
The MP8775 is an 8-bit Analog-to-Digital Converter in a
small 20 pin SOIC package. Designed using an
advanced 5 V CMOS process, this part offers excellent
performance, low power consumption and latch-up free
operation.
This device uses a two-step flash architecture to maintain
low power consumption at high conversion rates. The
input circuitry of the MP8775 includes an on-chip S/H
function and allows the user to digitize analog input
signals between GND and V
DD
. Careful design and chip
layout have achieved a low analog input capacitance.
This reduces “kickback” and eases the requirements of
the buffer/amplifier used to drive the MP8775.
The designer can choose the internally generated
reference voltages by connecting V
RB
to V
RBS
and V
RT
to
V
RTS
, or provide external reference voltages to the V
RB
and V
RT
pins. The internal reference generates 0.6 V at
V
RB
and 2.6 V at V
RT
. Providing external reference
voltages allows easy interface to any input signal range
between GND and V
DD
. This also allows the system to
adjust these voltages to cancel zero scale and full scale
errors, or to change the input range as needed.
The device operates from a single +5 V supply. Power
consumption is 85 mW at F
s
= 20 MHz.
Specified for operation over the commercial / industrial
(--40 to +85°C) temperature range, the MP8775 is
available in Surface Mount (SOIC), Shrunk Small Outline
(SSOP) and Plastic dual-in-line (PDIP) packages.
SIMPLIFIED BLOCK AND TIMING DIAGRAM
V
DD
V
RTS
V
RT
MSB
Comp.
LSB
Comp.
Latch
Encoder
+
Error
Correction
DB7 (MSB)
F/F
DB0 (LSB)
Sample
S/H
V
IN
Clock Logic
CLK
AGND
DGND
CLK
DB7-
DB0
N
N-3
N-2
N-1
N
AV
DD
DV
DD
Latch
V
RB
V
RBS
GND
Rev. 3.01
E1999
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538
z
(510) 668-7000
z
(510) 668-7017
EXAR [ EXAR CORPORATION ]
