MP8830
Parameter
3-State Leakage
Symbol
I
OZ
Min
–10
Typ
Max
10
Units
µA
Test Conditions/Comments
In pass-through mode
For testing, rise time = fall time =
10 ns. Output loading = 60 pF except for
AD0-AD9 for which loading is 40 pF. Rise
and fall times faster than 5 ns should be
avoided.
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
125
20
270
30
20
20
230
40
ns
ns
ns
ns
ns
ns
ns
ns
CVL to Channel A data.
BENL to Channel B data.
CENL to Channel C data.
Measured as part of analog feedthrough test.
Note, t
tapmax
< t
4min
+ t
6min.
Digital Timing Specifications
2
AENL, BENL, CENL
Pulse Width
D/A Data Hold Time
BENL Rising Edge to CENL Rising
Edge
AENL Rising Edge to CVL Falling
Edge
D/A Data Setup Time
Analog Input Hold Time
CVL Rising Edge to AENL Rising
Edge
A/D Data Enable Time
CENL Rising Edge to CVL Rising
Edge
Analog Input Settled to 0.1%
A/D Data Hold Time
Aperture Delay
t
9
t
10
t
11
t
AP
40
50
20
20
40
ns
ns
ns
ns
Analog sampling window delay from CVL ris-
ing (
↑
) edge (start) or AENL rising (
↑
) edge
(end).
Assumes the sample is taken at the rising
edge of AENL.
CVL Falling Edge to BENL Rising
Edge
Delay from CD5-14 to AD0-9 with
CREN=1
Delay from AD0-9 to CD5-14 with
CREN = 1
Delay from DCL Falling Edge to
Clamp on.
Delay from DCL Rising Edge to
Clamp off.
Time for AD0-9 and CD5-14 to switch
from normal operation to pass
through mode or vise versa (i.e. bus
contention).
Digital Quiet Time
t
12
t
13
t
14
t
15
t
16
t
17
180
50
50
40
40
0
40
ns
ns
ns
ns
ns
ns
External analog clamp voltage settling de-
pends on external circuitry.
External analog clamp voltage settling de-
pends on external circuitry.
User should stop driving the bus before
changing the mode and data will not be valid
for 40 ns after a change of mode.
This quiet time is necessary to reduce digital
crosstalk during the critical sampling time.
The accuracy of each conversion may be cor-
rupted due to digital noise on the board during
this period.
This quiet time is necessary to reduce digital
crosstalk during the critical sampling time.
The accuracy of each conversion may be cor-
rupted due to digital noise on the board during
this period.
t
18
15
ns
Digital Quiet Time
t
19
40
ns
Notes
1
Production testing performanced at 25°C.
2
Not production tested.
Rev. 1.00
6
EXAR [ EXAR CORPORATION ]
