Receiver input thresholds are between .2
to .7 volts typical. This allows the receiver
to detect standard TTL or CMOS logic-level
signals as well as RS-232 signals. If a re-
ceiver input is left unconnected or un-driven,
a 5kΩ pulldown resistor to ground will commit
the receiver to a logic- output state.
Highly Efficient Charge–Pump
The onboard dual-output charge pump is
used to generate positive and negative signal
voltages for the RS-232 drivers. This enables
fully compliant RS-232 and V.28 signals from
a single power supply device.
The charge pumps use four external capaci-
tors to hold and transfer electrical charge.
The
Exar–patented
design (US Patent
#5,306,954) uses a unique approach com-
pared to older, less–efficient designs. The
pumps use a four–phase voltage shifting
technique to attain symmetrical V+ and V-
power supplies. An intelligent control oscil-
lator regulates the operation of the charge
pump to maintain the proper voltages at
maximum efficiency.
Phase 1
V
SS
charge store and double — The positive
terminals of capacitors C
and C
2
are charged
from V
CC
with their negative terminals initially
connected to ground. C
l
+ is then connected
to ground and the stored charge from C
–
is
–
superimposed onto C
2
. Since C
2
+ is still
connected to V
CC
the voltage potential across
capacitor C
2
is now 2 x V
CC
.
V
CC
= +5V
Phase 2
— V
SS
transfer and invert — Phase two con-
nects the negative terminal of C
2
to the V
SS
storage capacitor and the positive terminal
of C
2
to ground. This transfers the doubled
and inverted (V-) voltage onto C
3
. Meanwhile,
capacitor C
charged from V
CC
to prepare it
for its next phase.
V
CC
= +5V
C
4
C
1
+
–
C
2
+
–
+
–
–
+
V
DD
Storage Capacitor
V
SS
Storage Capacitor
–10V
C
3
Figure 2. Charge Pump — Phase 2
Phase 3
V
DD
charge store and double —Phase three
is identical to the first phase. The positive
terminals of capacitors C
and C
2
are charged
from V
CC
with their negative terminals initially
connected to ground. C
l
+ is then connected
to ground and the stored charge from C
– is
superimposed onto C
2
–. Since C
2
+ is still
connected to V
CC
the voltage potential across
capacitor C
2
is now 2 x V
CC
.
V = +5V
CC
+5V
C
1
+
–
C
2
+
–
+
C
4
–
+
V
DD
Storage Capacitor
V
SS
Storage Capacitor
–
–5V
–5V
C
3
Figure 3. Charge Pump — Phase 3
+5V
C
1
+
–
C
2
+
–
+
C
4
–
+
V
DD
Storage Capacitor
V
SS
Storage Capacitor
–
–5V
–5V
C
3
Figure . Charge Pump — Phase
Phase 4
V
DD
transfer — The fourth phase connects
the negative terminal of C
2
to ground and
the positive terminal of C
2
to the V
DD
stor-
age capacitor. This transfers the doubled
(V+) voltage onto C
4
. Meanwhile, capacitor
C
is charged from V
CC
to prepare it for its
next phase.
SP207E_00_072309
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 50-668-707 • www.exar.com
6