Charge Pump
The charge pump is a Exar–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs.
The charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of
the input voltage (V
CC
) over the +3.0V to +5.5V
range. This is important to maintain compli-
ant RS-232 levels regardless of power supply
fluctuations.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump
is disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— V
SS
charge storage — During this phase of the
clock cycle, the positive side of capacitors C
1
and
C
2
are initially charged to V
CC
. C
l+
is then switched
to GND and the charge in C
1–
is transferred to C
2–
.
Since C
2+
is connected to V
CC
, the voltage potential
across capacitor C
2
is now 2 times V
CC
.
Phase 2
— V
SS
transfer — Phase two of the clock
connects the negative terminal of C
2
to the V
SS
storage capacitor and the positive terminal of
C
2
to GND. This transfers a negative gener-
ated voltage to C
3
. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to C
3
,
the positive side of capacitor C
1
is switched to V
CC
and the negative side is connected to GND.
Phase 3
— V
DD
charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C
1
produces –V
CC
in the negative
terminal of C
1
, which is applied to the negative
side of capacitor C
2
. Since C
2+
is at V
CC
, the volt-
age potential across C
2
is 2 times V
CC
.
Phase 4
— V
DD
transfer — The fourth phase of the clock
connects the negative terminal of C
2
to GND,
and transfers this positive generated voltage
across C
2
to C
4
, the V
DD
storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultane-
ous with the transfer of the voltage to C
4
, the
positive side of capacitor C
1
is switched to V
CC
and the negative side is connected to GND, al-
lowing the charge pump cycle to begin again.
The charge pump cycle will continue as long
as the operational conditions for the internal
oscillator are present.
Since both V
+
and V
–
are separately generated
from V
CC
, in a no–load condition V
+
and V
–
will
be symmetrical. Older charge pump approaches
that generate V
–
from V
+
will show a decrease in
the magnitude of V
–
compared to V
+
due to the
inherent inefficiencies in the design. The clock
rate for the charge pump typically operates at
greater than 250kHz. The external capacitors
can be as low as 0.1µF with a 16V breakdown
voltage rating.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3243E_100_072309
10
EXAR [ EXAR CORPORATION ]
