S P613 4
600kHz Synchronous PWM Step Down Controller
THEORY OF OPERATION
G
ENERAL
O
VERVIEW
The SP6134 is a fixed frequency, voltage
mode, synchronous PWM controller optimized
for high efficiency. The part has been designed
to be especially attractive for split plane
applications utilizing 5V to power the controller
and 3V to 15V for step down conversion. The
heart of the SP6134 is a wide bandwidth
transconductance
amplifier
designed
to
accommodate
Type
II
and
Type
III
compensation schemes. A precision 0.8V
reference present on the positive terminal of
the error amplifier permits the programming
of the output voltage down to 0.8V via the VFB
pin. The output of the error amplifier, COMP,
compared to a 1.1V peak-to-peak ramp is
responsible for trailing edge PWM control. This
voltage ramp and PWM control logic are
governed by the internal oscillator that
accurately sets the PWM frequency to 300kHz.
The SP6134 contains two unique control
features that are very powerful in distributed
applications. First, non-synchronous driver
control is enabled during start up to prohibit
the low side NFET from pulling down the
output until the high side NFET has attempted
to turn on. Second, a 100% duty cycle timeout
ensures that the low side NFET is periodically
enhanced during extended periods at 100%
duty cycle. This guarantees the synchronized
refreshing of the BST capacitor during very
large duty ratios. The SP6134 also contains a
number of valuable protection features. A
programmable input (VIN) UVLO allows a user
to set the exact value at which the conversion
voltage is at a safe point to begin down
conversion, and an internal VCC UVLO ensures
that the controller itself has enough voltage to
properly operate. Other protection features
include thermal shutdown and short-circuit
detection. In the event that either a thermal,
short-circuit, or UVLO fault is detected, the
SP6134 is forced into an idle state where the
output drivers are held off for a finite period
before a re-start is attempted.
S
OFT
S
TART
“Soft Start” is achieved when a power
converter ramps up the output voltage while
controlling the magnitude of the input supply
source current. In a modern step down
converter, ramping up the positive terminal of
the error amplifier controls soft start. As a
result, excess source current can be defined as
the current required to charge the output
capacitor.
IV
IN
= C
OUT
* DV
OUT
/ DTSoft-start
The SP6134 provides the user with the option
to program the soft start rate by tying a
capacitor from the SS pin to GND. The
selection of this capacitor is based on the
10uA pull up current present at the SS pin and
the 0.8V reference voltage. Therefore, the
excess source can be redefined as:
IV
IN
= C
OUT
* DV
OUT
*10μA / (C
SS
* 0.8V)
U
NDER
V
OLTAGE
L
OCK
O
UT
(UVLO)
The SP6134 contains two separate UVLO
comparators to monitor the bias (VCC) and
conversion (VIN) voltages independently. The
VCC UVLO threshold is internally set to 4.25V,
whereas
the
VIN
UVLO
threshold
is
programmable through the UVIN pin. When
the UVIN pin is greater than 2.5V, the SP6134
is permitted to start up pending the removal of
all other faults. Both the VCC and VIN UVLO
comparators have been designed with
hysteresis to prevent noise from resetting a
fault.
T
HERMAL AND
S
HORT
-C
IRCUIT
P
ROTECTION
Because the SP6134 is designed to drive large
NFETs running at high current, there is a
chance that either the controller or power
converter will become too hot. Therefore, an
internal thermal shutdown (145°C) has been
included to prevent the IC from malfunctioning
at extreme temperatures.
A short-circuit detection comparator has also
been included in the SP6134 to protect against
the accidental short or sever build up of
current at the output of the power converter.
This comparator constantly monitors the
© 2008 Exar Corporation
6/15
Rev. 2.0.0
EXAR [ EXAR CORPORATION ]
