SPECIFICATIONS
VCC = 4.75V to 5.50V for SP705/707/813L,813M, VCC = 4.50V to 5.50V for SP706/708, TA = TMIN to TMAX, unless otherwise noted, typical at 25oC.
PARAMETER
MIN.
TYP. MAX.
UNITS
CONDITIONS
WDO Output Voltage
VCC-1.5
ISOURCE=800µA
ISINK=3.2mA
V
0.40
MR Pull-Up Current
MR Pulse Width, tMR
100
150
250
600
0.8
µA
MR = 0V
ns
MR Input Threshold
LOW
HIGH
V
2.0
MR to Reset Out Delay, tMD
PFI Input Threshold
PFI Input Current
250
ns
V
Note 2
CC = 5V
1.20
1.25
1.30
V
-25.00
0.01 25.00
nA
V
PFO Output Voltage
VCC-1.5
ISOURCE = 800µA
SINK = 3.2mA
0.4
I
Note 1: The input voltage limits on PFI and MR can be exceeded if the input current is less than 10mA.
Note 2: Applies to both RESET in the SP705-SP708 and RESET in the SP707/708/813L/813M.
DIP and SOIC
µSOIC
1
1
2
8
7
8
7
MR
RESET / RESET*
WDO
WDO
WDI
PFO
2
3
4
V
CC
RESET / RESET*
SP705
SP706
SP813L
SP705
SP706
SP813L
3
4
6
5
6
5
GND
PFI
MR
WDI
PFO
PFI
V
CC
GND
1
2
1
2
8
7
8
7
RESET
RESET
MR
N.C.
PFO
RESET
RESET
V
CC
SP707
SP708
SP707
SP708
3
4
6
5
3
4
6
5
MR
GND
PFI
PFI
N.C.
PFO
V
CC
GND
* SP813L only
* SP813L only
Figure 1. Pinouts
June 2008 Rev C
SP705 Low Power Microprocessor Supervisory Circuits
© 2008 Exar Corporation
3