XR88C92/192
SYMBOL DESCRIPTION
(* 44 pin TQFP)
Symbol
44
IP3
3
Pin
40
2
44*
41
Signal
type
I
Pin Description
Multi-purpose input or Channel A transmit external clock port
input. The transmit data is clocked on the falling edge of the
clock.
Multi-purpose input or Channel A receive external clock input.
The transmit data is clocked on the rising edge of the clock.
Multi-purpose input or Channel B Transmit external clock
input. The transmit data is clocked on the falling edge of the
clock.
Multi-purpose input or Channel B receive external clock input.
The transmit data is clocked on the rising edge of the clock.
Chip select (active low). A low at this pin enables the serial
port / CPU data transfer operation.
IP4
43
39
37
I
IP5
42
38
36
I
IP6
41
37
35
I
-CS
39
35
33
I
D0-D7
28,18
27,19
26,20
25,21
25,16
24,17
23,18
22,19
22,12
21,13
20,14
19,15
I/O
Bi-directional data bus. Eight bit, three state data bus to
transfer information to or from the CPU. D0 is the least
significant bit of the data bus and the first serial data bit to be
received or transmitted.
-IOW
9
8
3
I
Write strobe (active low). A low on this pin will transfer the
contents of the CPU data bus to the addressed register.
Read strobe (active low). A low on this pin will transfer the
contents of the XR88C92/192 register to CPU data bus.
Power supply input, 2.97V to 5.5V.
No Connection.
-IOR
10
9
4
I
VCC
N.C.
44
1,12
23,34
40
38,39
11,23
Pwr
Rev. 1.31
6