XRK4991A
PRELIMINARY
3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER
5.
6.
7.
8.
For XRK4993-2 t
SKEW0
is measured with C
L
= 0pF; for C
L
= 20pF, t
SKEW0
= 0.35ns Max.
xr
REV. P1.0.2
There are 2 classes of outputs: Nominal (multiple of t
U
delay), and Divided (QC[1:0] only in Divide-by-2 or Divide-by-4
mode).
t
DEV
is the output-to-output skew between any two devices operating under the same conditions (V
CC
, ambient temperature,
air flow, etc.)
8. t
LOCK
is the time that is required before synchronization is achieved. This specification is valid only after V
CC
is stable and
within normal operating limits. This parameter is measured from the application of a new signal or frequency at CLKIN or
FB_IN until tPD is within specified limits.
t
PD
is measured with CLKIN input rise and fall times (from 0.8V to 2V) of 1ns.
Measured at 2V.
Measured at 0.8V.
9.
10.
11.
F
IGURE
4. AC T
EST
L
OADS AND
W
AVEFORMS
V
CC
150Ω
Output
150Ω
20pF
t
ORISE
t
OFALL
2.0V
0.8V
t
PWL
t
PWH
LVTTL Output Waveform
<1ns
3.0V
2.0V
Vth = 1.5V
0.8V
0V
LVTTL Input Test Waveform
<1ns
10
EXAR [ EXAR CORPORATION ]
