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AUGUST 2004
PRELIMINARY
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.0
GENERAL DESCRIPTION
The XRT73LC00A DS3/E3/STS-1 Line Interface Unit
is a low power CMOS version of the XRT73L00A and
consists of a line transmitter and receiver integrated
on a single chip and is designed for DS3, E3 or SO-
NET STS-1 applications.
XRT73LC00A can be configured to support the E3
(34.368 Mbps), DS3 (44.736 Mbps) or the SONET
STS-1 (51.84 Mbps) rates.
In the transmit direction, the XRT73LC00A encodes
input data to either B3ZS (for DS3/STS-1 applica-
tions) or HDB3 (for E3 applications) format and con-
verts the data into the appropriate pulse shapes for
transmission over coaxial cable via a 1:1 transformer.
In the receive direction the XRT73LC00A performs
equalization on incoming signals, performs Clock Re-
covery, decodes data from either B3ZS or HDB3 for-
mat, converts the receive data into TTL/CMOS for-
mat, checks for LOS or LOL conditions and detects
and declares the occurrence of line code violations.
The XRT73LC00A also contains a 4-Wire Micropro-
cessor Serial Interface for accessing the on-chip
Command registers.
F
IGURE
1. B
LOCK
D
IAGRAM OF THE
XRT73LC00A
E3
STS -1/DS3
Host/(HW )
FEATURES
•
Incorporates an improved Timing Recovery circuit
and is pin and functional compatible to XRT73L00A
•
Meets E3/DS3/STS-1 Jitter Tolerance Require-
ments
•
Full Loop-Back Capability
•
Transmit and Receive Power Down Modes
•
Full Redundancy Support
•
Contains a 4-Wire Microprocessor Serial Interface
•
Uses Minimum External components
•
Low Power CMOS Design
•
Single +3.3V Power Supply
•
5 V Tolerant pins
•
-40°C to +85°C Operating Temperature Range
•
Available in a 44 pin TQFP package
APPLICATIONS
•
Interfaces to E3, DS3 or SONET STS-1 Networks
•
CSU/DSU Equipment
•
PCM Test Equipment
•
Fiber Optic Terminals
•
Multiplexers
RLOL EXCLK
ICT
RCLKINV
RTIP
RRING
AGC/
Equalizer
Slicer
Clock
Recovery
RCLK1
Invert
LCV/(RCLK2)
Da ta
Recovery
RE QDIS
Peak
Detector
LOS Detector
HDB3/
B 3ZS
Decoder
RP OS
RNEG
DR/SR
LO STHR
SDI
SDO/(LCV)
SClk
CS
REGRESET
Serial
Processor
Interface
RLOS
Loop M UX
LLB
RLB
ENDECDIS
TAOS
TTIP
Pulse
Shaping
TRING
HDB3/
B3ZS
Encoder
Tra nsm it
Logic
Duty Cycle Adjust
TPDATA
TNDATA
TClk
M TIP
M RING
DM O
Device
M onitor
Tx
Control
TXLEV
TXO FF
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
•
(510) 668-7000
•
FAX (510) 668-7017
•
www.exar.com
EXAR [ EXAR CORPORATION ]
