PRELIMINARY
FEBRUARY 2004
XRT83SL34
REV. P1.0.8
QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
GENERAL DESCRIPTION
The XRT83SL34 is a fully integrated Quad (four
channel) short-haul line interface unit for T1
(1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or 120Ω, or
J1 110Ω applications.
In T1 applications, the XRT83SL34 can generate five
transmit pulse shapes to meet the short-haul Digital
Cross-Connect (DSX-1) template requirements. It
also provides programmable transmit pulse
generators for each channel that can be used for
output pulse shaping allowing performance
improvement over a wide variety of conditions.
The XRT83SL34 provides both a parallel
Host
microprocessor interface as well as a
Hardware
mode for programming and control.
Both the B8ZS and HDB3 encoding and decoding
functions are selectable as well as AMI. An on-chip
crystal-less jitter attenuator with a 32 or 64 bit FIFO
can be placed either in the receive or the transmit path
with loop bandwidths of less than 3Hz. The
XRT83SL34 provides a variety of loop-back and
diagnostic features as well as transmit driver short
circuit detection and receive loss of signal monitoring.
It supports internal impedance matching for 75Ω,
100Ω, 110Ω and 120Ω for both transmitter and
receiver. In the absence of the power supply, the
transmit outputs and receive inputs are tri-stated
allowing for redundancy applications The chip
includes an integrated programmable clock multiplier
that can synthesize T1 or E1 master clocks from a
variety of external clock sources.
APPLICATIONS
•
T1 Digital Cross-Connects (DSX-1)
•
ISDN Primary Rate Interface
•
CSU/DSU E1/T1/J1 Interface
•
T1/E1/J1 LAN/WAN Routers
•
Public switching Systems and PBX Interfaces
•
T1/E1/J1 Multiplexer and Channel Banks
Features (See Page 2)
F
IGURE
1. B
LOCK
D
IAGRAM OF THE
XRT83SL34 T1/E1/J1 LIU (H
OST
M
ODE
)
MCLK E1
MCLK T1
MASTER CLO CK SYNTH ESIZER
MCLKO UT
O ne of four channels, CHANNEL_n - (n= 0:3)
TPO S_n/TDATA _n
TNE G_n/CO DES _n
TCLK _n
TAO S
ENABLE
TX FILTER
& PULSE
SHAPER
DFM
D RIVE
MON ITO R
DMO _n
TTIP_n
TRING _n
Q RSS
PATTER N
GEN ERATO R
HDB 3/
B8ZS
ENCO DER
TX/R X JIT TER
ATT ENUATO R
TIMIN G
CO NTR O L
LINE
DRIVER
LBO [3:0]
JA
SELECT
Q RSS ENABLE
REM OT E
LO OPB AC K
D IG ITAL
LO OPB AC K
LO O PBACK
ENABLE
T IMING &
DATA
REC O VERY
PEAK
DET ECTO R
& S LICER
LO CAL
ANALOG
LO O PBACK
TXON_n
Q RSS
D ETECT OR
RCLK _n
RNE G_n/LCV _n
RP OS_n/RDATA _n
NETW OR K
LOO P
D ETECT OR
HDB 3/
B8ZS
DECO DER
TX/R X JIT TER
ATT ENUATO R
RX
EQ UALIZER
RTIP_n
RRING_n
NLCD EN AB LE
LO S
DETEC TO R
AIS
DETEC TO R
EQ UALIZER
C ON TRO L
RLOS _n
HW /HO ST
W R_R/W
RD_DS
ALE-AS
CS
RDY_DTACK
INT
TEST
MIC RO PRO CESSO R CO NT RO LLER
ICT
µ
P TS1
µ
P TS2
D[7:0]
µ
P CLK
A[7:0]
RE SET
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
•
(510) 668-7000
•
FAX (510) 668-7017
•
www.exar.com
EXAR [ EXAR CORPORATION ]
