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XRT91L30IQ 参数 Datasheet PDF下载

XRT91L30IQ图片预览
型号: XRT91L30IQ
PDF下载: 下载PDF文件 查看货源
内容描述: STS-12 / STM-4或STS-3 / STM-1的SONET / SDH收发器 [STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 39 页 / 754 K
品牌: EXAR [ EXAR CORPORATION ]
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DECEMBER 2006
XRT91L30
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
REV. 1.0.1
GENERAL DESCRIPTION
The XRT91L30 is a fully integrated SONET/SDH
transceiver for SONET/SDH 622.08 Mbps STS-12/
STM-4 or 155.52 Mbps STS-3/STM-1 applications.
The transceiver includes an on-chip Clock Multiplier
Unit (CMU), which uses a high frequency Phase-
Locked Loop (PLL) to generate the high-speed
transmit serial clock from a slower external clock
reference. It also provides Clock and Data Recovery
(CDR) function by synchronizing its on-chip Voltage
Controlled Oscillator (VCO) to the incoming serial
data stream. The internal CDR unit can be disabled
and bypassed in lieu of an externally recovered
received clock from the optical module. Either the
internally recovered clock or the externally recovered
clock can be used for loop timing applications. The
chip provides serial-to-parallel and parallel-to-serial
converters using an 8-bit wide LVTTL system
interface in both receive and transmit directions.
The transmit section includes an option to accept a
F
IGURE
1. B
LOCK
D
IAGRAM OF
XRT91L30
parallel clock signal from the framer/mapper to
synchronize the transmit section timing. The device
can internally monitor Loss of Signal (LOS) condition
and automatically mute received data upon LOS. An
on-chip SONET/SDH frame byte and boundary
detector and frame pulse generator offers the ability
recover SONET/SDH framing and to byte align the
receive serial data stream into the 8-bit parallel bus.
APPLICATIONS
SONET/SDH-based Transmission Systems
Add/Drop Multiplexers
Cross Connect Equipment
ATM and Multi-Service Switches, Routers and
Switch/Routers
DSLAMS
SONET/SDH Test Equipment
DWDM Termination Equipment
STS-12/STM-4 or STS-3/STM-1
TRANSCEIVER
TXDI[7:0]
8
TXPCLK_IO
REFCLKP/N
TTLREFCLK
PISO
(Parallel Input
Serial Output)
ENB
Re-Timer
TXOP/N
MUX
Div by
8
ENB
XOR
CMU
DLOOP
RLOOPS
ALOOP
MUX
CDRAUXREFCLK
MUX
RXDO[7:0]
SIPO
(Serial Input
Parallel Output)
CDR
MUX
RXIP/N
8
XRXCLKIP/N
RXPCLKO
Div by 8
Control Block
Loop Filters
Clock Control
CAP1N
CAP2N
CAP1P
CAP2P
DLOSDIS
LOSEXT
OOF
FRAMEPULSE
CDRDIS
CMUFREQSEL
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
(510) 668-7000
FAX (510) 668-7017
www.exar.com
STS-12/STS-3
CDRREFSEL
LOOPTIME
PIO_CTRL
RLOOPS
DLOOP
ALOOP
Reset