EMP110-Q5
UPDATED: 04/24/2008
5.8 – 8.0 GHz Surface-Mounted PA
d
22uF
0.1uF
0.1uF
22uF
Recommended Circuit Schematic:
d
V
d1
NC
NC
NC NC NC
V
d2
NC
NC
RF
in
NC
NC
EMP110
-Q5
V
g
NC NC NC NC
RF
out
NC
NC
V
g
22uF
0.1uF
Notes:
1) External bypass capacitors should be placed as close to the package as possible.
2) Dual biasing sequence required:
a. Turn-on Sequence: Apply V
g
= -2.5V, followed by V
d
= 7V, lastly increase V
g
until required I
dq
b. Turn-off Sequence: Turn off V
d
, followed by V
g
3) Demonstration board available upon request.
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: 408-737-1711 Fax: 408-737-1868 Web:
www.excelics.com
Page 3 of 3
May 2008