E S I
E S I
Excel Semiconductor inc.
the device immediately terminates any operation in
progress, tristates all output pins, and ignores all
read/write commands for the duration of the
RESET# pulse The device also resets the internal
state machine to reading array data. The operation
that was interrupted should be reinitiated once after
the device is ready to accept another command
sequence, to ensure data integrity.
Sector protection can be implemented via two
methods.
-
-
In-system protection
A9 High-voltage protection
To check whether the sector protection was suc-
cessfully executed or not, another operation called
“protect verification” needs to be performed after
the protection operation on a sector. All protection
and protect verifications provided in the device are
summarized in detail at the Table 1.
CMOS Standby during Device Reset
Current is reduced for the duration of the RESET#
pulse. When RESET# is held at Vss
device draws the greatly reduced CMOS standby
current ( I ). If RESET# is held at V but not
+ 0.3V, the
In-System Protection
CC4
IL
within Vss+0.3V, the standby current will be greater.
“In-system protection”, the primary method,
requires V (11.5V~12.5V) on the RESET# with
ID
RY/BY# and Terminating Operations
A6=0, A1=1, and A0=0. This method can be imple-
mented either in-system or via programming equip-
ment. This method uses standard microprocessor
bus cycle timing. Refer to Fig. 26 for timing diagram
and Fig. 2 for the protection algorithm.
If RESET# is asserted during a program or erase
operation, the RY/BY# pin remains a “0” (busy) until
the internal reset operation is completed, which
requires a time of t
(during Embedded Algo-
READY
rithms). The system can thus monitor RY/BY# to
determine whether the reset operation is completed.
If RESET# is asserted when a program or erase
operation is not executing (RY/BY# pin is “1”), the
A9 High-Voltage Protection
“High-voltage protection”, the alternate method
intended only for programming equipment, must
reset operation is completed within a time of t
force V (11.5~12.5V) on address pin A9 and con-
READY
ID
(not during Embedded Algorithms). The system can
trol pin OE# with A6=0, A1=1 and A0=0. Refer to
Fig. 28 for timing diagram and Fig. 4 for the protec-
tion algorithm.
read data after the RESET# pin returns to V , which
IH
requires a time of t
RH.
SECTOR UNPROTECTION
RESET# tied to the System Reset
The previously protected sectors must be unpro-
tected before modifying any data in the sectors.
The sector unprotection algorithm unprotects all
sectors in parallel. All unprotected sectors must first
be protected prior to the first sector unprotection
write cycle to avoid any over-erase due to the intrin-
sic erase characteristics of the protection cell. After
the unprotection operation, all previously protected
sectors will need to be individually re-protected.
Standard microprocessor bus cycle timings are
used in the unprotection and unprotect verification
operations. Three unprotect methods are provided
in the ES29LV400 device. All unprotection and
unprotect verification cycles are summarized in
detail at the Table 1.
The RESET# pin may be tied to the system reset cir-
cuitry. A system reset would thus also reset the
Flash memory, enabling the system to read the boot-
up firmware from the Flash memory.Refer to the AC
Characteristics tables for RESET# parameters and
to Fig. 17 for the timing diagram.
SECTOR PROTECTION
The ES29LV400 features hardware sector protec-
tion. In the device, sector protection is performed on
the sector previously defined in the Table 3-4. Once
after a sector is protected, any program or erase
operation is not allowed in the protected sector. The
previously protected sectors must be unprotected by
one of the unprotect methods provided here before
changing data in those sectors.
-
-
-
In-system unprotection
A9 High-voltage unprotection
Temporary sector unprotection
8
Rev.1C January 5, 2006
ES29LV400D
EXCELSEMI [ EXCEL SEMICONDUCTOR INC. ]
