100307 Low Power Quint Exclusive OR/NOR Gate
August 1989
Revised August 2000
100307
Low Power Quint Exclusive OR/NOR Gate
General Description
The 100307 is monolithic quint exclusive-OR/NOR gate.
The Function output is the wire-OR of all five exclusive-OR
outputs. All inputs have 50 k
Ω
pull-down resistors.
Features
s
Low Power Operation
s
2000V ESD protection
s
Pin/function compatible with 100107
s
Voltage compensated operating range
= −
4.2V to
−
5.7V
s
Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Order Number
1000307PC
1000307QC
1000307QI
Package Number
N24E
V28A
V28A
Package Description
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
−
40
°
C to
+
85
°
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names
D
na
–D
ne
F
O
a
–O
e
O
a
–O
e
Description
Data Inputs
Function Output
Data Outputs
Complementary
Data Outputs
28-Pin PLCC
Logic Equation
F
=
(D
1a
⊕
D
2a
)
+
(D
1b
⊕
D
2b
)
+
(D
1c
⊕
D
2c
)
+
(D
1d
⊕
D
2d
)
+
(D
1e
⊕
D
2e
).
© 2000 Fairchild Semiconductor Corporation
DS010582
www.fairchildsemi.com
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
