100314 Low Power Quint Differential Line Receiver
February 1990
Revised August 2000
100314
Low Power Quint Differential Line Receiver
General Description
The 100314 is a monolithic quint differential line receiver
with emitter-follower outputs. An internal reference supply
(V
BB
) is available for single-ended reception. When used in
single-ended operation the apparent input threshold of the
true inputs is 25 mV to 30 mV higher (positive) than the
threshold of the complementary inputs. Unlike other F100K
ECL devices, the inputs do not have input pull-down resis-
tors.
Active current sources provide common-mode rejection of
1.0V in either the positive or negative direction. A defined
output state exists if both inverting and non-inverting inputs
are at the same potential between V
EE
and V
CC
. The
defined state is logic HIGH on the O
a
–O
e
outputs.
Features
s
35% power reduction of the 100114
s
2000V ESD protection
s
Pin/function compatible with 100114
s
Voltage compensated operating range
= −
4.2V to
−
5.7V
s
Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Order Number
100314SC
100314PC
100314QC
100314QI
Package Number
M24B
N24E
V28A
V28A
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
−
40
°
C to
+
85
°
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP/SOIC
28-Pin PLCC
Pin Descriptions
Pin Names
D
a
–D
e
D
a
–D
e
O
a
–O
e
O
a
–O
e
Data Inputs
Inverting Data Inputs
Data Outputs
Complementary Data Outputs
Description
© 2000 Fairchild Semiconductor Corporation
DS010260
www.fairchildsemi.com
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
