100322 Low Power 9-Bit Buffer
October 1989
Revised August 2000
100322
Low Power 9-Bit Buffer
General Description
The 100322 is a monolithic 9-bit buffer. The device con-
tains nine non-inverting buffer gates with single input and
output. All inputs have 50 k
Ω
pull-down resistors and all
outputs are buffered.
Features
s
30% power reduction of the 100122
s
2000V ESD protection
s
Pin/function compatible with 100122
s
Voltage compensated operating range
= −
4.2V to
−
5.7V
s
Available to MIL-STD-883
s
Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Order Number
100322PC
100322QC
100322QI
Package Number
N24E
V28A
V28A
Package Description
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
−
40
°
C to
+
85
°
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names
D
1
, D
9
O
1
, O
9
Description
Data Inputs
Data Outputs
28-Pin PLCC
Truth Table
Inputs
D
1
- D
9
L
H
H
=
HIGH Voltage Level
Outputs
O
1
- O
9
L
H
L
=
LOW Voltage Level
© 2000 Fairchild Semiconductor Corporation
DS010608
www.fairchildsemi.com
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