100324 Low Power Hex TTL-to-ECL Translator
July 1988
Revised August 2000
100324
Low Power Hex TTL-to-ECL Translator
General Description
The 100324 is a hex translator, designed to convert TTL
logic levels to 100K ECL logic levels. The inputs are com-
patible with standard or Schottky TTL. A common Enable
(E), when LOW, holds all inverting outputs HIGH and holds
all true outputs LOW. The differential outputs allow each
circuit to be used as an inverting/non-inverting translator, or
as a differential line driver. The output levels are voltage
compensated over the full
−
4.2V to
−
5.7V range.
When the circuit is used in the differential mode, the
100324, due to its high common mode rejection, over-
comes voltage gradients between the TTL and ECL ground
systems. The V
EE
and V
TTL
power may be applied in either
order.
The 100324 is pin and function compatible with the 100124
with similar AC performance, but features power dissipa-
tion roughly half of the 100124 to ease system cooling
requirements.
Features
s
Pin/function compatible with 100124
s
Meets 100124 AC specifications
s
50% power reduction of the 100124
s
Differential outputs
s
2000V ESD protection
s
−
4.2V to
−
5.7V operating range
s
Available to MIL-STD-883
s
Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Order Number
100324SC
100324PC
100324QC
100324QI
Package Number
M24B
N24E
V28A
V28A
Package Description
28-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
−
40
°
C to
+
85
°
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
24-Pin DIP/SOIC
28-Pin PLCC
© 2000 Fairchild Semiconductor Corporation
DS009878
www.fairchildsemi.com
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
