100329A Low Power Octal ECL/TTL Bidirectional Translator with Register
August 1989
Revised August 2000
100329A
Low Power Octal ECL/TTL Bidirectional Translator with
Register
General Description
The 100329A is an octal registered bidirectional translator
designed to convert TTL logic levels to 100K ECL logic lev-
els and vice versa. The direction of the translation is deter-
mined by the DIR input. A LOW on the output enable input
(OE) holds the ECL outputs in a cut-off state and the TTL
outputs at a high impedance level. The outputs change
synchronously with the rising edge of the clock input (CP)
even though only one output is enabled at the time.
The cut-off state is designed to be more negative than a
normal ECL LOW level. This allows the output emitter-fol-
lowers to turn off when the termination supply is
−
2.0V, pre-
senting a high impedance to the data bus. This high
impedance reduces the termination power and prevents
loss of low state noise margin when several loads share
the bus.
The 100329A is designed with FAST
TTL output buffers,
featuring optimal DC drive and capable of quickly charging
and discharging highly capacitive loads. All inputs have
50 k
Ω
pull-down resistors.
Features
s
Bidirectional translation
s
ECL high impedance outputs
s
Registered outputs
s
FAST TTL outputs
s
3-STATE outputs
s
Voltage compensated operating range
= −
4.2V to
−
5.7V
s
High drive IOS
Ordering Code:
Order Number
100329APC
Package Number
N24E
Package Description
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
E
0
–E
7
T
0
–T
7
OE
CP
DIR
Description
ECL Data I/O
TTL Data I/O
Output Enable Input
Clock Pulse Input
(Active Rising Edge)
Direction Control Input
All pins function at 100K ECL levels except for T
0
–T
7
.
FAST is a registered trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation
DS500047
www.fairchildsemi.com
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
