100343 Low Power 8-Bit Latch
October 1989
Revised August 2000
100343
Low Power 8-Bit Latch
General Description
The 100343 contains eight D-type latches, individual
inputs, (D
n
), outputs (Q
n
), a common enable pin (E), and a
latch enable pin (LE). A Q output follows its D input when
both E and LE are LOW. When either E or LE (or both) are
HIGH, a latch stores the last valid data present on its D
input prior to E or LE going HIGH.
The 100343 outputs are designed to drive a 50
Ω
termina-
tion resistor to
−
2.0V. All inputs have 50 k
Ω
pull-down
resistors.
Features
s
Low power operation
s
2000V ESD protection
s
Voltage compensated operating range
= −
4.2V to
−
5.7V
s
Available to industrial grade temperature range
Ordering Code:
Order Number
100343PC
100343QC
100343QI
Package Number
N24E
V28A
V28A
Package Description
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
−
40
°
C to
+
85
°
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names
D
0
–D
7
E
LE
Q
0
–Q
7
NC
Description
Data Inputs
Enable Input
Latch Enable Input
Data Inputs
No Connect
28-Pin PLCC
© 2000 Fairchild Semiconductor Corporation
DS010250
www.fairchildsemi.com
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
