100371 Low Power Triple 4-Input Multiplexer with Enable
October 1989
Revised August 2000
100371
Low Power Triple 4-Input Multiplexer with Enable
General Description
The 100371 contains three 4-input multiplexers which
share a common decoder (inputs S
0
and S
1
). Output buffer
gates provide true and complement outputs. A HIGH on the
Enable input (E) forces all true outputs LOW (see Truth
Table). All inputs have 50 k
Ω
pull-down resistors.
Features
s
35% power reduction of the 100171
s
2000V ESD protection
s
Pin/function compatible with 100171
s
Voltage compensated operating range
= −
4.2V to
−
5.7V
s
Available to industrial grade temperature range
Ordering Code:
Order Number
100371SC
100371PC
10371QC
10371QI
Package Number
M24B
N24E
V28A
V28A
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
−
40
°
C to
+
85
°
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP/SOIC
Pin Descriptions
Pin Names
I
0x
–I
3x
S
0
, S
1
E
Z
a
–Z
c
Z
a
–Z
c
Description
Data Inputs
Select Inputs
Enable Input (Active LOW)
Data Outputs
Complementary Data Outputs
28-Pin PLCC
© 2000 Fairchild Semiconductor Corporation
DS010148
www.fairchildsemi.com
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
