DM74LS14 Hex Inverter with Schmitt Trigger Inputs
August 1986
Revised March 2000
DM74LS14
Hex Inverter with Schmitt Trigger Inputs
General Description
This device contains six independent gates each of which
performs the logic INVERT function. Each input has hyster-
esis which increases the noise immunity and transforms a
slowly changing input signal to a fast changing, jitter free
output.
Ordering Code:
Order Number
DM74LS14M
DM74LS14SJ
DM74LS14N
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Y
=
A
Input
A
L
H
H
=
HIGH Logic Level
L
=
LOW Logic Level
Output
Y
H
L
© 2000 Fairchild Semiconductor Corporation
DS006353
www.fairchildsemi.com
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
