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ML4824IP1 参数 Datasheet PDF下载

ML4824IP1图片预览
型号: ML4824IP1
PDF下载: 下载PDF文件 查看货源
内容描述: 功率因数校正和PWM控制器组合 [Power Factor Correction and PWM Controller Combo]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器功率因数校正光电二极管
文件页数/大小: 15 页 / 106 K
品牌: FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
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www.fairchildsemi.com
ML4824
Power Factor Correction and PWM Controller
Combo
Features
• Internally synchronized PFC and PWM in one IC
• Low total harmonic distortion
• Reduces ripple current in the storage capacitor between
the PFC and PWM sections
• Average current, continuous boost leading edge PFC
• Fast transconductance error amp for voltage loop
• High efficiency trailing edge PWM can be configured for
current mode or voltage mode operation
• Average line voltage compensation with brownout
control
• PFC overvoltage comparator eliminates output
“runaway” due to load removal
• Current fed gain modulator for improved noise immunity
• Overvoltage protection, UVLO, and soft start
General Description
The ML4824 is a controller for power factor corrected,
switched mode power supplies. Power Factor Correction
(PFC) allows the use of smaller, lower cost bulk capacitors,
reduces power line loading and stress on the switching FETs,
and results in a power supply that fully complies with
IEC1000-2-3 specification. The ML4824 includes circuits
for the implementation of a leading edge, average current,
“boost” type power factor correction and a trailing edge,
pulse width modulator (PWM).
The device is available in two versions; the ML4824-1 (f
PWM
= f
PFC
) and the ML4824-2 (f
PWM
= 2 x f
PFC
). Doubling the
switching frequency of the PWM allows the user to design
with smaller output components while maintaining the best
operating frequency for the PFC. An over-voltage compara-
tor shuts down the PFC section in the event of a sudden
decrease in load. The PFC section also includes peak current
limiting and input voltage brown-out protection. The PWM
section can be operated in current or voltage mode at up to
250kHz and includes a duty cycle limit to prevent trans-
former saturation.
Block Diagram
16
VEAO
VFB
15
2.5V
IAC
2
VRMS
4
ISENSE
3
RAMP 1
7
RAMP 2
8
8V
VDC
6
VCC
SS
5
8V
DC ILIMIT
9
PULSE WIDTH MODULATOR
VCCZ
UVLO
50µA
1.25V
+
+
1
IEAO
POWER FACTOR CORRECTOR
OVP
+
+
13
VCC
VCCZ
13.5V
7.5V
REFERENCE
S
–1V
+
VEA
+
VREF
14
3.5kΩ
IEA
+
2.7V
Q
GAIN
MODULATOR
3.5kΩ
R
S
Q
PFC OUT
Q
12
PFC ILIMIT
R
OSCILLATOR
(-2 VERSION ONLY)
x2
DUTY CYCLE
LIMIT
Q
PWM OUT
S
VFB
2.5V
+
Q
VIN OK
1V
+
11
R
DC ILIMIT
Q
REV. 1.0.6 11/7/03