ML4824
ELECTRICAL CHARACTERISTICS (Continued)
SYMBOL
PFC
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Duty Cycle
V
V
> 4.0V
0
%
%
V
IEAO
Maximum Duty Cycle
Output Low Voltage
< 1.2V
90
95
0.4
0.8
0.7
10.5
10
IEAO
I
I
I
I
I
= -20mA
0.8
2.0
1.5
OUT
OUT
OUT
OUT
OUT
= -100mA
V
= 10mA, V = 8V
V
CC
Output High Voltage
Rise/Fall Time
= 20mA
10
V
= 100mA
9.5
V
C = 1000pF
L
50
ns
PWM
Duty Cycle Range
Output Low Voltage
ML4824-1
ML4824-2
0-44
0-37
0-47
0-40
0.4
0-50
0-45
0.8
%
%
V
I
I
I
I
I
= -20mA
OUT
OUT
OUT
OUT
OUT
= -100mA
0.8
2.0
V
= 10mA, V = 8V
0.7
1.5
V
CC
Output High Voltage
Rise/Fall Time
= 20mA
10
10.5
10
V
= 100mA
9.5
V
C = 1000pF
L
50
ns
SUPPLY
Shunt Regulator Voltage (V
)
12.8
12.4
13.5
14.2
±300
14.6
1.0
V
mV
V
CCZ
V
CCZ
V
CCZ
Load Regulation
Total Variation
25mA < I < 55mA
±100
CC
Load, Temp
Start-up Current
V
= 11.8V, C = 0
0.7
16
mA
mA
V
CC
CC
L
Operating Current
V
< V
- 0.5V, C = 0
19
CCZ
L
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
12
13
14
2.7
3.0
3.3
V
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2: Includes all bias currents to other circuits connected to the VFB pin.
-1
Note 3: Gain = K x 5.3V; K = (IGAINMOD - IOFFSET) x IAC x (VEAO - 1.5V)
.
REV. 1.01 12/7/2000
5
FAIRCHILD [ FAIRCHILD SEMICONDUCTOR ]
