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LPS200 参数 Datasheet PDF下载

LPS200图片预览
型号: LPS200
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能,低噪声PHEMT [HIGH PERFORMANCE LOW NOISE PHEMT]
分类和应用: 晶体晶体管
文件页数/大小: 2 页 / 33 K
品牌: FILTRONIC [ FILTRONIC COMPOUND SEMICONDUCTORS ]
 浏览型号LPS200的Datasheet PDF文件第2页  
H
IGH
P
ERFORMANCE
L
OW
N
OISE
PHEMT
FEATURES
1.0 dB Noise Figure at 18 GHz
10 dB Associated Gain at 18 GHz
Low DC Power Consumption
LPS200
GATE
BOND
PAD (2X)
SOURCE
BOND
PAD (2x)
DRAIN
BOND
PAD (2X)
DIE SIZE: 12.6X10.2mils (320x260
µm)
DIE THICKNESS: 3.9 mils (100
µm)
BONDING PADS: 3.3X2.6 mils (85x65
µm)
DESCRIPTION AND APPLICATIONS
The LPS200 is an Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs)
Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam direct-
write 0.25
µ
m by 200
µ
m Schottky barrier gate. The recessed “mushroom” gate structure minimizes
parasitic gate-source and gate resistances. The epitaxial structure and processing have been
optimized for high dynamic range. The LPS200 also features Si
3
N
4
passivation and is available in
various packages.
Typical applications are as low noise devices for both narrowband and broadband amplifiers.
ELECTRICAL SPECIFICATIONS @ T
Ambient
= 25°C
Parameter
Saturated Drain-Source Current
Noise Figure
Associated Gain at minimum NF
Maximum Drain-Source Current
Transconductance
Gate-Source Leakage Current
Pinch-Off Voltage
Thermal Resistivity
frequency=18 GHz
Symbol
I
DSS
NF
G
A
I
MAX
G
M
I
GSO
V
P
Θ
JC
Test Conditions
V
DS
= 2 V; V
GS
= 0 V
V
DS
= 2 V; I
DS
= 25% I
DSS
V
DS
= 2 V; I
DS
= 25% I
DSS
V
DS
= 2 V; V
GS
= 1 V
V
DS
= 2 V; V
GS
= 0 V
V
GS
= -5 V
V
DS
= 2 V; I
DS
= 1 mA
-0.25
50
9
Min
15
Typ
25
0.7
10
125
70
1
-0.8
285
10
-1.5
Max
50
1.3
Units
mA
dB
dB
mA
mS
µA
V
°C/W
Phone:
(408) 988-1845
Fax:
(408) 970-9950
http://
www.filss.com
Revised:
1/23/01
Email:
sales@filss.com