MC81F4x16
29.3 Hardware Conditions to Enter the ISP Mode
Anytime RESET/ Vpp pin goes +9V, the MCU entering an ISP mode except RESET/Vpp pin is
output mode(See note1).
User Target Board
User reset circuitry
USB-SIO-ISP B/D
VDD(+5v)
10-pin connector
0.1uF
75KΩ
PCB
9
7
8
5
6
3
4
1
2
10
Top View
RESET/Vpp
SDATA
SCLK
Xout
Xin
GND
VDD
1. If other signals affect SIO communication in ISP mode, disconnect these pins by using a jumper or
a switch.
Figure 29-2 Hardware Conditions to Enter the ISP Mode
Note:
1) Using RESET/Vpp pin as an output mode is not recommended even it is possible.
Anytime RESET/Vpp pin goes +9v, the MCU entering an ISP mode except RESET/Vpp pin
is output mode. If it is output mode, +9v signal is clashing with the output voltage.
So if RESET/Vpp pin is used as an output mode, do not try to execute any ISP commands
when MCU is in normal operation mode. It is allowable when only power on time. See
„Entering ISP mode at power on time‟ for more information.
2) There is a 10KΩ pull-down register at VPP pin in the ISP Board. That is why 75KΩ
register is suggested for R/C reset circuit. So those two register makes a voltage divider
circuit when ISP board is connected. So the VPP level can‟t go down to low level status if the
register of reset circuit value is too small. Otherwise, if the register value is too large the
capacitor value also changed and the reset circuit‟s characteristics also changed.
186
October 19, 2009 Ver.1.35
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